JPS6441938A - Microcomputer developing device - Google Patents

Microcomputer developing device

Info

Publication number
JPS6441938A
JPS6441938A JP62198416A JP19841687A JPS6441938A JP S6441938 A JPS6441938 A JP S6441938A JP 62198416 A JP62198416 A JP 62198416A JP 19841687 A JP19841687 A JP 19841687A JP S6441938 A JPS6441938 A JP S6441938A
Authority
JP
Japan
Prior art keywords
data
input terminal
cpu
executing
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62198416A
Other languages
Japanese (ja)
Inventor
Hiroshi Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP62198416A priority Critical patent/JPS6441938A/en
Publication of JPS6441938A publication Critical patent/JPS6441938A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To shorten a program developing period by fetching input terminal data in a pattern memory into the input terminal of a CPU at the time of executing an input instruction and writing output data into a data memory at the time of executing an output instruction. CONSTITUTION:Input terminal data to the input terminal of an emulation CPU 1 can be stored into a pattern memory 3, and the data are written into respective input and output instruction deciding circuits 5 and 6 through a system address bus 9 and a data bus 10 of a host CPU. At the time of executing the output instruction, the output data of the CPU 1 are written into a data memory 4 with the circuit 6.
JP62198416A 1987-08-07 1987-08-07 Microcomputer developing device Pending JPS6441938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62198416A JPS6441938A (en) 1987-08-07 1987-08-07 Microcomputer developing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62198416A JPS6441938A (en) 1987-08-07 1987-08-07 Microcomputer developing device

Publications (1)

Publication Number Publication Date
JPS6441938A true JPS6441938A (en) 1989-02-14

Family

ID=16390749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62198416A Pending JPS6441938A (en) 1987-08-07 1987-08-07 Microcomputer developing device

Country Status (1)

Country Link
JP (1) JPS6441938A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5408637A (en) * 1990-12-27 1995-04-18 Hitachi, Ltd. Emulation techniques giving necessary information to a microcomputer to perform software debug and system debug even for incomplete target system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5408637A (en) * 1990-12-27 1995-04-18 Hitachi, Ltd. Emulation techniques giving necessary information to a microcomputer to perform software debug and system debug even for incomplete target system

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