JPS6441255A - Multi-chip package - Google Patents

Multi-chip package

Info

Publication number
JPS6441255A
JPS6441255A JP19762387A JP19762387A JPS6441255A JP S6441255 A JPS6441255 A JP S6441255A JP 19762387 A JP19762387 A JP 19762387A JP 19762387 A JP19762387 A JP 19762387A JP S6441255 A JPS6441255 A JP S6441255A
Authority
JP
Japan
Prior art keywords
terminals
substrate
carrier
lsi chip
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19762387A
Other languages
English (en)
Inventor
Akihiro Dotani
Tatsuo Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP19762387A priority Critical patent/JPS6441255A/ja
Publication of JPS6441255A publication Critical patent/JPS6441255A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/145—Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules

Landscapes

  • Semiconductor Integrated Circuits (AREA)
JP19762387A 1987-08-07 1987-08-07 Multi-chip package Pending JPS6441255A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19762387A JPS6441255A (en) 1987-08-07 1987-08-07 Multi-chip package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19762387A JPS6441255A (en) 1987-08-07 1987-08-07 Multi-chip package

Publications (1)

Publication Number Publication Date
JPS6441255A true JPS6441255A (en) 1989-02-13

Family

ID=16377560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19762387A Pending JPS6441255A (en) 1987-08-07 1987-08-07 Multi-chip package

Country Status (1)

Country Link
JP (1) JPS6441255A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978228A (en) * 1996-12-31 1999-11-02 Intel Corporation Apparatus for mounting a very large scale integration (VLSI) chip to a computer chassis for cooling
US6137688A (en) * 1996-12-31 2000-10-24 Intel Corporation Apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply
EP2061289A1 (en) * 2007-11-13 2009-05-20 St Microelectronics S.A. Interconnection of embedded passive components and substrates
JP2015005557A (ja) * 2013-06-19 2015-01-08 富士通株式会社 パッケージ実装構造

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978228A (en) * 1996-12-31 1999-11-02 Intel Corporation Apparatus for mounting a very large scale integration (VLSI) chip to a computer chassis for cooling
US6137688A (en) * 1996-12-31 2000-10-24 Intel Corporation Apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply
US6462943B1 (en) 1996-12-31 2002-10-08 Intel Corporation Method and apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply
EP2061289A1 (en) * 2007-11-13 2009-05-20 St Microelectronics S.A. Interconnection of embedded passive components and substrates
JP2015005557A (ja) * 2013-06-19 2015-01-08 富士通株式会社 パッケージ実装構造

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