JPS6439057A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS6439057A
JPS6439057A JP62195572A JP19557287A JPS6439057A JP S6439057 A JPS6439057 A JP S6439057A JP 62195572 A JP62195572 A JP 62195572A JP 19557287 A JP19557287 A JP 19557287A JP S6439057 A JPS6439057 A JP S6439057A
Authority
JP
Japan
Prior art keywords
layer
groove
embedded
type
sidewall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62195572A
Other languages
Japanese (ja)
Inventor
Hiroshi Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62195572A priority Critical patent/JPS6439057A/en
Publication of JPS6439057A publication Critical patent/JPS6439057A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H10B12/373DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate the capacitor extending under or around the transistor

Landscapes

  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To simplify a structure and to improve a cutoff characteristic, by combining a switching MOS transistor, which is formed on the surface of an element forming region partitioned with grid shaped grooves, and a capacitor, which comprises an embedded layer in the element forming region and a conductor layer in the groove through a dielectric layer that is provided on the sidewall of the groove. CONSTITUTION:A P-type epitaxial layer 3, which is partitioned using grooves formed in a grid shape, is provided on the surface of a P-type silicon substrate 1. An N-type embedded layer 2 is embedded beneath the surface of the P-type epitaxial layer 3 in contact with a part of the sidewall of the groove. A dielectric layer 5 is provided on the inner wall of the groove. A conductor layer 6 forms a capacitor through the dielectric layer 5 together with the N-type embedded layer 2, which is embedded at the inner side of the groove. A gate insulating film 8 is provided on the surface of the P-type epitaxial layer 3. A gate electrode 9 is selectively provided on the film 8. An apposite conductivity type source and drain regions 10 and 11 are provided to the P-type epitaxial layer 3 and the gate electrode 9 in a self-alignment manner. An opposite conductivity type connecting region 4 is provided along the sidewall of the groove so as to connect the embedded regions. Thus the structure is simplified, and a cutoff characteristic can be improved.
JP62195572A 1987-08-04 1987-08-04 Semiconductor storage device Pending JPS6439057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62195572A JPS6439057A (en) 1987-08-04 1987-08-04 Semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62195572A JPS6439057A (en) 1987-08-04 1987-08-04 Semiconductor storage device

Publications (1)

Publication Number Publication Date
JPS6439057A true JPS6439057A (en) 1989-02-09

Family

ID=16343356

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62195572A Pending JPS6439057A (en) 1987-08-04 1987-08-04 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS6439057A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0782186A3 (en) * 1995-12-27 1999-08-04 Siemens Aktiengesellschaft Method to form a buried, implanted plate for dram trench storage capacitors

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62105467A (en) * 1985-10-30 1987-05-15 インターナショナル ビジネス マシーンズ コーポレーション Capacitor integrated circuit structural unit
JPS63254763A (en) * 1987-04-10 1988-10-21 Matsushita Electric Ind Co Ltd Semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62105467A (en) * 1985-10-30 1987-05-15 インターナショナル ビジネス マシーンズ コーポレーション Capacitor integrated circuit structural unit
JPS63254763A (en) * 1987-04-10 1988-10-21 Matsushita Electric Ind Co Ltd Semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0782186A3 (en) * 1995-12-27 1999-08-04 Siemens Aktiengesellschaft Method to form a buried, implanted plate for dram trench storage capacitors

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