JPS6435940A - Manufacture of integrated circuit package - Google Patents
Manufacture of integrated circuit packageInfo
- Publication number
- JPS6435940A JPS6435940A JP19101187A JP19101187A JPS6435940A JP S6435940 A JPS6435940 A JP S6435940A JP 19101187 A JP19101187 A JP 19101187A JP 19101187 A JP19101187 A JP 19101187A JP S6435940 A JPS6435940 A JP S6435940A
- Authority
- JP
- Japan
- Prior art keywords
- plate
- recessed part
- planar dimension
- upper plate
- flatness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To make it possible to obtain easily the flatness of the bottom surface of a recessed part and the flatness of a peripheral surface part for mounting a lead frame by a method wherein a penetrated hole of a planar dimension equal to that of the recessed part for mounting a semiconductor chip is provided in an upper plate. CONSTITUTION:An upper plate has the same planar dimension as that of a container 16 and has a penetrated hole 18 of the same planar dimension as that of a recessed part 7 at its central part. The upper plate 16a consisting of a tabular metal core material 17a covered with a metal oxide is manufactured and a lower plate 16b, which has the same external dimensions as those of the plate 16a and consists of a tabular metal core material 21a covered with a metal oxide, is manufactured. Moreover, the plates 16a and 16b are laminated to form integrally. Thereby, there exists no protruding part, which is an obstacle to conveyance, and moreover, the peripheral surface part, on which a lead frame is mounted, of the integrally formed plate can be flattened regardless of the depth of the recessed part and the thickness of the metal plate materials to be used.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19101187A JPH0719855B2 (en) | 1987-07-30 | 1987-07-30 | Method of manufacturing integrated circuit container |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19101187A JPH0719855B2 (en) | 1987-07-30 | 1987-07-30 | Method of manufacturing integrated circuit container |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6435940A true JPS6435940A (en) | 1989-02-07 |
JPH0719855B2 JPH0719855B2 (en) | 1995-03-06 |
Family
ID=16267391
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19101187A Expired - Lifetime JPH0719855B2 (en) | 1987-07-30 | 1987-07-30 | Method of manufacturing integrated circuit container |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0719855B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5155299A (en) * | 1988-10-05 | 1992-10-13 | Olin Corporation | Aluminum alloy semiconductor packages |
US7061083B1 (en) | 1998-12-17 | 2006-06-13 | Hitachi, Ltd. | Semiconductor devices |
-
1987
- 1987-07-30 JP JP19101187A patent/JPH0719855B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5155299A (en) * | 1988-10-05 | 1992-10-13 | Olin Corporation | Aluminum alloy semiconductor packages |
US7061083B1 (en) | 1998-12-17 | 2006-06-13 | Hitachi, Ltd. | Semiconductor devices |
US7298029B2 (en) | 1998-12-17 | 2007-11-20 | Hitachi, Ltd. | Semiconductor devices and manufacturing method therefor |
Also Published As
Publication number | Publication date |
---|---|
JPH0719855B2 (en) | 1995-03-06 |
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