JPS6430536U - - Google Patents

Info

Publication number
JPS6430536U
JPS6430536U JP1987124927U JP12492787U JPS6430536U JP S6430536 U JPS6430536 U JP S6430536U JP 1987124927 U JP1987124927 U JP 1987124927U JP 12492787 U JP12492787 U JP 12492787U JP S6430536 U JPS6430536 U JP S6430536U
Authority
JP
Japan
Prior art keywords
display
solder
semiconductor chip
alignment film
connection electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987124927U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987124927U priority Critical patent/JPS6430536U/ja
Publication of JPS6430536U publication Critical patent/JPS6430536U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10175Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/38Effects and problems related to the device integration
    • H01L2924/384Bump effects
    • H01L2924/3841Solder bridging

Landscapes

  • Liquid Crystal (AREA)
  • Wire Bonding (AREA)
JP1987124927U 1987-08-17 1987-08-17 Pending JPS6430536U (US20030199744A1-20031023-C00003.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987124927U JPS6430536U (US20030199744A1-20031023-C00003.png) 1987-08-17 1987-08-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987124927U JPS6430536U (US20030199744A1-20031023-C00003.png) 1987-08-17 1987-08-17

Publications (1)

Publication Number Publication Date
JPS6430536U true JPS6430536U (US20030199744A1-20031023-C00003.png) 1989-02-23

Family

ID=31375079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987124927U Pending JPS6430536U (US20030199744A1-20031023-C00003.png) 1987-08-17 1987-08-17

Country Status (1)

Country Link
JP (1) JPS6430536U (US20030199744A1-20031023-C00003.png)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6111132B2 (US20030199744A1-20031023-C00003.png) * 1979-08-07 1986-04-01 Kotobuki Sangyo

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6111132B2 (US20030199744A1-20031023-C00003.png) * 1979-08-07 1986-04-01 Kotobuki Sangyo

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