JPS6430264A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6430264A JPS6430264A JP18561887A JP18561887A JPS6430264A JP S6430264 A JPS6430264 A JP S6430264A JP 18561887 A JP18561887 A JP 18561887A JP 18561887 A JP18561887 A JP 18561887A JP S6430264 A JPS6430264 A JP S6430264A
- Authority
- JP
- Japan
- Prior art keywords
- film
- resist
- processes
- oxide film
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To decrease the processes in number by a method wherein a selfaligned bipolar transistor is manufactured by making advantage of a dummy pattern of a nitride film selectively left unremoved on a region of a semiconductor layer or a substrate. CONSTITUTION:An epitaxial layer 2 and a field oxide film 3 are formed on a silicon substrate 1, a CVU-Si3N4 film is built on the whole face after an n<+> buried layer 5 is deposited, patterning is performed onto the Si3N4 film through the use of a resist, and a nitride film 20 is left unremoved as a dummy pattern. And, a CVU is laid on the whole face as the resist used for the pattering of the bitride film 20 is left unremoved, the CVD on the resist is removed through a lift-off, then a CVD-SiO2 is coated thereon, an oxide film 21 is left through an anisotropic ion etching. In addition, poly-silicon is deposited so as to make the upper face of the poly-silicon layer 22 level with those of the nitride film 20 and the oxide film 21, the dry control etching is performed through the use of resist. By these processes, the processes ranging from providing a window for an emitter to the formation of an emitter electrode are made to decreased in number and a defective conductivity between an outer and an inner base can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18561887A JPS6430264A (en) | 1987-07-27 | 1987-07-27 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18561887A JPS6430264A (en) | 1987-07-27 | 1987-07-27 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6430264A true JPS6430264A (en) | 1989-02-01 |
Family
ID=16173946
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18561887A Pending JPS6430264A (en) | 1987-07-27 | 1987-07-27 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6430264A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03151642A (en) * | 1989-11-08 | 1991-06-27 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
KR100273687B1 (en) * | 1997-06-30 | 2000-12-15 | 김영환 | Bipolar transistor and method for forming the same |
-
1987
- 1987-07-27 JP JP18561887A patent/JPS6430264A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03151642A (en) * | 1989-11-08 | 1991-06-27 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
KR100273687B1 (en) * | 1997-06-30 | 2000-12-15 | 김영환 | Bipolar transistor and method for forming the same |
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