JPS6429941A - Input circuit - Google Patents

Input circuit

Info

Publication number
JPS6429941A
JPS6429941A JP62185917A JP18591787A JPS6429941A JP S6429941 A JPS6429941 A JP S6429941A JP 62185917 A JP62185917 A JP 62185917A JP 18591787 A JP18591787 A JP 18591787A JP S6429941 A JPS6429941 A JP S6429941A
Authority
JP
Japan
Prior art keywords
high voltage
input
circuit
signal
standby
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62185917A
Other languages
Japanese (ja)
Other versions
JPH0721770B2 (en
Inventor
Hisashi Fujiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62185917A priority Critical patent/JPH0721770B2/en
Publication of JPS6429941A publication Critical patent/JPS6429941A/en
Publication of JPH0721770B2 publication Critical patent/JPH0721770B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Microcomputers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To surely set the specific mode such as a test mode, etc., by setting a high voltage detection circuit at an operating state in spite of the logic level of an inputted standby mode signal when the leading edge of a power source is detected. CONSTITUTION:A voltage level sense circuit 11 which generates a one-shot pulse only at the time of leading edge of the power source VDD, a flip-flop 12 which sets the output of the voltage level sense circuit 11 as S input and the output signal RST of an inverter 2 as R input, and a NAND circuit 13 which sets the inverse output of a control signal STANDBY and the flip-flop 12 as input and outputs a signal, the inverse of STANDBY to the high voltage detection circuit 1 are provided. Therefore, it is possible to operate the high voltage circuit without initializing the standby mode signal by effective reset input at the time of applying the power source, and to make specific control for a timing to impress a high voltage on a reset input terminal unnecessary.
JP62185917A 1987-07-24 1987-07-24 Input circuit Expired - Lifetime JPH0721770B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62185917A JPH0721770B2 (en) 1987-07-24 1987-07-24 Input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62185917A JPH0721770B2 (en) 1987-07-24 1987-07-24 Input circuit

Publications (2)

Publication Number Publication Date
JPS6429941A true JPS6429941A (en) 1989-01-31
JPH0721770B2 JPH0721770B2 (en) 1995-03-08

Family

ID=16179139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62185917A Expired - Lifetime JPH0721770B2 (en) 1987-07-24 1987-07-24 Input circuit

Country Status (1)

Country Link
JP (1) JPH0721770B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5294882A (en) * 1992-07-28 1994-03-15 Sharp Kabushiki Kaisha Integrated circuit capable of testing reliability

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5294882A (en) * 1992-07-28 1994-03-15 Sharp Kabushiki Kaisha Integrated circuit capable of testing reliability

Also Published As

Publication number Publication date
JPH0721770B2 (en) 1995-03-08

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