JPS642972B2 - - Google Patents

Info

Publication number
JPS642972B2
JPS642972B2 JP57232784A JP23278482A JPS642972B2 JP S642972 B2 JPS642972 B2 JP S642972B2 JP 57232784 A JP57232784 A JP 57232784A JP 23278482 A JP23278482 A JP 23278482A JP S642972 B2 JPS642972 B2 JP S642972B2
Authority
JP
Japan
Prior art keywords
flop
error
flip
check circuit
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57232784A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59123949A (ja
Inventor
Katsumi Kubo
Takashi Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57232784A priority Critical patent/JPS59123949A/ja
Publication of JPS59123949A publication Critical patent/JPS59123949A/ja
Publication of JPS642972B2 publication Critical patent/JPS642972B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP57232784A 1982-12-29 1982-12-29 エラ−発生時の処理方式 Granted JPS59123949A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57232784A JPS59123949A (ja) 1982-12-29 1982-12-29 エラ−発生時の処理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57232784A JPS59123949A (ja) 1982-12-29 1982-12-29 エラ−発生時の処理方式

Publications (2)

Publication Number Publication Date
JPS59123949A JPS59123949A (ja) 1984-07-17
JPS642972B2 true JPS642972B2 (enrdf_load_html_response) 1989-01-19

Family

ID=16944682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57232784A Granted JPS59123949A (ja) 1982-12-29 1982-12-29 エラ−発生時の処理方式

Country Status (1)

Country Link
JP (1) JPS59123949A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2580558B2 (ja) * 1985-04-26 1997-02-12 株式会社日立製作所 インタフェース装置

Also Published As

Publication number Publication date
JPS59123949A (ja) 1984-07-17

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