JPS6428897A - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPS6428897A
JPS6428897A JP62184029A JP18402987A JPS6428897A JP S6428897 A JPS6428897 A JP S6428897A JP 62184029 A JP62184029 A JP 62184029A JP 18402987 A JP18402987 A JP 18402987A JP S6428897 A JPS6428897 A JP S6428897A
Authority
JP
Japan
Prior art keywords
package
integrated circuit
hybrid integrated
main body
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62184029A
Other languages
Japanese (ja)
Inventor
Koji Takemoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62184029A priority Critical patent/JPS6428897A/en
Publication of JPS6428897A publication Critical patent/JPS6428897A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

PURPOSE:To enable the free choice of mounting style by freely molding the shape of a package by covering the periphery of a main body with a package made of synthetic resin having an electromagnetically shielding effect. CONSTITUTION:A main body 1 of hybrid integrated circuit is enclosed with a package 2 having electromagnetically shielding properties. The package 2 is formed of a resin material which is given conductive properties by mixing conductive fibers such as of metal, carbon, etc., into a synthetic resin. As a result, external electromagnetic waves are restrained from invading into the hybrid integrate circuit. As the package 2 is made of resin, its form can be arranged according to a mounting style easily. Then, a shielding case need not be prepared separately.
JP62184029A 1987-07-23 1987-07-23 Hybrid integrated circuit Pending JPS6428897A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62184029A JPS6428897A (en) 1987-07-23 1987-07-23 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62184029A JPS6428897A (en) 1987-07-23 1987-07-23 Hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS6428897A true JPS6428897A (en) 1989-01-31

Family

ID=16146106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62184029A Pending JPS6428897A (en) 1987-07-23 1987-07-23 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS6428897A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6682932B2 (en) 1998-09-24 2004-01-27 Kabushiki Kaisha Toyota Chuo Kenkyusho Weathering test method
JP3810734B2 (en) * 2000-06-06 2006-08-16 三菱電機株式会社 Communication equipment

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6682932B2 (en) 1998-09-24 2004-01-27 Kabushiki Kaisha Toyota Chuo Kenkyusho Weathering test method
US7018586B2 (en) 1998-09-24 2006-03-28 Kabushiki Kaisha Toyota Chuo Kenkyusho Weathering test apparatus
JP3810734B2 (en) * 2000-06-06 2006-08-16 三菱電機株式会社 Communication equipment

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