JPS53103385A - Integrated circuit for watches - Google Patents

Integrated circuit for watches

Info

Publication number
JPS53103385A
JPS53103385A JP1842277A JP1842277A JPS53103385A JP S53103385 A JPS53103385 A JP S53103385A JP 1842277 A JP1842277 A JP 1842277A JP 1842277 A JP1842277 A JP 1842277A JP S53103385 A JPS53103385 A JP S53103385A
Authority
JP
Japan
Prior art keywords
watches
integrated circuit
covering
prevent
conductive material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1842277A
Other languages
Japanese (ja)
Inventor
Mitsuo Koike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP1842277A priority Critical patent/JPS53103385A/en
Publication of JPS53103385A publication Critical patent/JPS53103385A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Clocks (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To prevent the adverse influence of electromagnetic wave noises by covering the surface of an IC with a conductive material such as Al5, etc.
COPYRIGHT: (C)1978,JPO&Japio
JP1842277A 1977-02-22 1977-02-22 Integrated circuit for watches Pending JPS53103385A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1842277A JPS53103385A (en) 1977-02-22 1977-02-22 Integrated circuit for watches

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1842277A JPS53103385A (en) 1977-02-22 1977-02-22 Integrated circuit for watches

Publications (1)

Publication Number Publication Date
JPS53103385A true JPS53103385A (en) 1978-09-08

Family

ID=11971204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1842277A Pending JPS53103385A (en) 1977-02-22 1977-02-22 Integrated circuit for watches

Country Status (1)

Country Link
JP (1) JPS53103385A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5627962A (en) * 1979-08-15 1981-03-18 Matsushita Electric Ind Co Ltd Integrated circuit device
JPS5645070A (en) * 1979-09-21 1981-04-24 Hitachi Ltd Semiconductor integrated circuit device
JPS5670647A (en) * 1979-11-14 1981-06-12 Matsushita Electronics Corp Semiconductor device
JPS5736859A (en) * 1980-08-18 1982-02-27 Pioneer Electronic Corp Integrated circuit device
US5700715A (en) * 1994-06-14 1997-12-23 Lsi Logic Corporation Process for mounting a semiconductor device to a circuit substrate
US5840599A (en) * 1989-06-30 1998-11-24 Texas Instruments Incorporated Process of packaging an integrated circuit with a conductive material between a lead frame and the face of the circuit
JP2003068974A (en) * 2001-08-28 2003-03-07 Fujitsu Ltd Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5627962A (en) * 1979-08-15 1981-03-18 Matsushita Electric Ind Co Ltd Integrated circuit device
JPS5645070A (en) * 1979-09-21 1981-04-24 Hitachi Ltd Semiconductor integrated circuit device
JPS5670647A (en) * 1979-11-14 1981-06-12 Matsushita Electronics Corp Semiconductor device
JPS5736859A (en) * 1980-08-18 1982-02-27 Pioneer Electronic Corp Integrated circuit device
US5840599A (en) * 1989-06-30 1998-11-24 Texas Instruments Incorporated Process of packaging an integrated circuit with a conductive material between a lead frame and the face of the circuit
US5700715A (en) * 1994-06-14 1997-12-23 Lsi Logic Corporation Process for mounting a semiconductor device to a circuit substrate
JP2003068974A (en) * 2001-08-28 2003-03-07 Fujitsu Ltd Semiconductor device

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