JPS6425258A - Memory access circuit - Google Patents

Memory access circuit

Info

Publication number
JPS6425258A
JPS6425258A JP17988887A JP17988887A JPS6425258A JP S6425258 A JPS6425258 A JP S6425258A JP 17988887 A JP17988887 A JP 17988887A JP 17988887 A JP17988887 A JP 17988887A JP S6425258 A JPS6425258 A JP S6425258A
Authority
JP
Japan
Prior art keywords
memory
data
access circuit
writing
written
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17988887A
Other languages
Japanese (ja)
Other versions
JP2523662B2 (en
Inventor
Yoshibumi Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP62179888A priority Critical patent/JP2523662B2/en
Publication of JPS6425258A publication Critical patent/JPS6425258A/en
Application granted granted Critical
Publication of JP2523662B2 publication Critical patent/JP2523662B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To quickly develop data by having flags to correspond to each address of a memory, executing the read-out action of a memory and a logic operation with writing data when the flag is ON and executing the writing of data when the flag is OFF. CONSTITUTION:A memory access circuit 102 is interposed between a CPU 100 and a memory 27 and executes the input/output control of data to the memory 27. When the memory access circuit 102 writes data to the memory 27 and the data is written to the address of the memory 27 already made accessed, a logic operation with data stored in the memory 27 and the writing data to the memory 27 is executed to be stored into the memory 27, and when the data is written to the address of the memory 27 not to be made access yet, the writing data is written into the memory 27 as it is.
JP62179888A 1987-07-21 1987-07-21 Memory access circuit Expired - Fee Related JP2523662B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62179888A JP2523662B2 (en) 1987-07-21 1987-07-21 Memory access circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62179888A JP2523662B2 (en) 1987-07-21 1987-07-21 Memory access circuit

Publications (2)

Publication Number Publication Date
JPS6425258A true JPS6425258A (en) 1989-01-27
JP2523662B2 JP2523662B2 (en) 1996-08-14

Family

ID=16073651

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62179888A Expired - Fee Related JP2523662B2 (en) 1987-07-21 1987-07-21 Memory access circuit

Country Status (1)

Country Link
JP (1) JP2523662B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11708380B2 (en) 2020-10-22 2023-07-25 Entegris, Inc. Selective alkylation of cyclopentadiene

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11708380B2 (en) 2020-10-22 2023-07-25 Entegris, Inc. Selective alkylation of cyclopentadiene

Also Published As

Publication number Publication date
JP2523662B2 (en) 1996-08-14

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees