JPS642462U - - Google Patents
Info
- Publication number
- JPS642462U JPS642462U JP9591987U JP9591987U JPS642462U JP S642462 U JPS642462 U JP S642462U JP 9591987 U JP9591987 U JP 9591987U JP 9591987 U JP9591987 U JP 9591987U JP S642462 U JPS642462 U JP S642462U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- circuit board
- multilayer wiring
- wiring circuit
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Printed Boards (AREA)
Description
第１図Ａ及びＢはメモリーカード用多層配線回
路基板における表面の配線パターンおよび裏面の
配線パターンを示すものである。２のＩＣ接合部
パターンは、表Ａと裏Ｂで面対称となつており、
１のスルホール回路でつながつており、さらにこ
のスルホール回路が内層回路とつながつており、
主に内層回路で必要な配線が施されている。第２
図はメモリーＩＣ搭載部の断面図である。５のＩ
Ｃが同方向に向いており、ＩＣのそれぞれの側か
ら見るとＩＣの上面と下面が見え、端子の順番が
互いに逆向きになつて接合されている。
図中１……スルホール、２……ＩＣ接合部、３
……ＩＣピン番号、４……外部端子、５……ＩＣ
、６……多層回路基板、７……内層回路を示す。
FIGS. 1A and 1B show the wiring pattern on the front surface and the wiring pattern on the back surface of a multilayer wiring circuit board for a memory card. The IC joint pattern of No. 2 is symmetrical between the front A and back B.
It is connected by the through-hole circuit of No. 1, and this through-hole circuit is further connected to the inner layer circuit.
Necessary wiring is mainly provided for the inner layer circuit. Second
The figure is a sectional view of the memory IC mounting section. 5 I
C are facing in the same direction, and when viewed from each side of the IC, the top and bottom surfaces of the IC are visible, and the terminals are bonded in reverse order. In the figure 1...Through hole, 2...IC junction, 3
...IC pin number, 4...External terminal, 5...IC
, 6...Multilayer circuit board, 7... Indicates an inner layer circuit.
Claims (1)
メモリーＩＣという）を搭載してなるメモリーカ
ードモジユールにおいて、回路基板が多層配線基
板であつて、その表面のメモリーＩＣ接合部パタ
ーンと裏面のメモリーＩＣ接合部パターンとが面
対称、すなわち表裏の投影パターンが一致する配
線回路パターンを有するものであつて、該多層配
線回路基板表裏にメモリーＩＣを側面から見て同
方向に搭載してなるメモリーカードモジユール。 In a memory card module equipped with a plurality of surface-mounted memory integrated circuit chips (hereinafter referred to as memory ICs), the circuit board is a multilayer wiring board, and the memory IC joint pattern on the front side and the memory IC joint pattern on the back side are A memory card module having a wiring circuit pattern that is plane symmetrical with respect to the multilayer wiring circuit board, that is, the projection patterns on the front and back sides match, and in which memory ICs are mounted on the front and back sides of the multilayer wiring circuit board in the same direction when viewed from the side. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9591987U JPS642462U (en) | 1987-06-24 | 1987-06-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9591987U JPS642462U (en) | 1987-06-24 | 1987-06-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS642462U true JPS642462U (en) | 1989-01-09 |
Family
ID=31320680
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9591987U Pending JPS642462U (en) | 1987-06-24 | 1987-06-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS642462U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5939057A (en) * | 1982-08-27 | 1984-03-03 | Hitachi Ltd | Semiconductor memory storage |
-
1987
- 1987-06-24 JP JP9591987U patent/JPS642462U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5939057A (en) * | 1982-08-27 | 1984-03-03 | Hitachi Ltd | Semiconductor memory storage |
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