JPS642441A - Communication control equipment - Google Patents
Communication control equipmentInfo
- Publication number
- JPS642441A JPS642441A JP15651887A JP15651887A JPS642441A JP S642441 A JPS642441 A JP S642441A JP 15651887 A JP15651887 A JP 15651887A JP 15651887 A JP15651887 A JP 15651887A JP S642441 A JPS642441 A JP S642441A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- pulses
- terminal
- mpu
- communication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To reduce the load on an MPU and to improve the communication efficiency by generating terminal number select pulses by the hardware in a communication controller which generates terminal address select pulses and select an opposite communication terminal among plural terminals to transmit and receive serial data.
CONSTITUTION: When the MPU 1 confirms that there is a signal on neither of data transmitting and receiving lines SD and RD at the start of a communication from a signal from a delay circuit 8, a control signal line ER is held at low level and a terminal address selection mode is entered. Then the MPU 1 sets a numeral corresponding to the address of the opposite communication terminal in a presettable counter 9. This counter 9 actuates a counter 10 with a clearing function. Consequently, the counter 10 outputs count pulses as terminal address select pulses 200 through an inverter 12. The pulses 200 are sent out to the line SD through a gate 11 and a driver 3 and also inputted to the counter 9. The counter 9 counts down from the set numeral in synchronism with the input of a pulse 200 and stops the operation of the counter 10 when the counted value reaches 0.
COPYRIGHT: (C)1989,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15651887A JPS642441A (en) | 1987-06-25 | 1987-06-25 | Communication control equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15651887A JPS642441A (en) | 1987-06-25 | 1987-06-25 | Communication control equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH012441A JPH012441A (en) | 1989-01-06 |
JPS642441A true JPS642441A (en) | 1989-01-06 |
Family
ID=15629536
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15651887A Pending JPS642441A (en) | 1987-06-25 | 1987-06-25 | Communication control equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS642441A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005310154A (en) * | 2004-04-19 | 2005-11-04 | Intersil Americas Inc | Two-wire chip-to-chip interface |
JP2008135455A (en) * | 2006-11-27 | 2008-06-12 | Ngk Insulators Ltd | Chip transfer apparatus |
-
1987
- 1987-06-25 JP JP15651887A patent/JPS642441A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005310154A (en) * | 2004-04-19 | 2005-11-04 | Intersil Americas Inc | Two-wire chip-to-chip interface |
JP2008135455A (en) * | 2006-11-27 | 2008-06-12 | Ngk Insulators Ltd | Chip transfer apparatus |
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