JPS642367A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS642367A JPS642367A JP15801487A JP15801487A JPS642367A JP S642367 A JPS642367 A JP S642367A JP 15801487 A JP15801487 A JP 15801487A JP 15801487 A JP15801487 A JP 15801487A JP S642367 A JPS642367 A JP S642367A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- oxide film
- integrated circuit
- impurity concentration
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
PURPOSE:To form the structure of a MOSFET using the other wiring as a gate, to shape a high resistance load element capable of controlling the potential of the other wiring in one wiring and to improve the degree of integration by forming one of the wirings crossing through an insulating film by a semiconductor and shaping a crossing region in the wirings in low impurity concentration in a conductivity type different from that of other regions. CONSTITUTION:A first layer wiring 1 extending in the vertical direction in a semiconductor integrated circuit and a second layer wiring 2 extending in the parallel direction are formed by polycrystalline silicon, and laminated onto a field oxide film 3 on a semiconductor substrate 1 through an inter-layer thermal oxide film 4. The wiring 1 is buried into a CVD oxide film 5, only a crossing region 21 in which the wiring 2 crosses is shaped in n-type polycrystalline silicon in low impurity concentration, and p-n junctions are formed with p-type other regions 22 having high impurity concentration and low resistance. When the oxide film 3 is thinned, the resistance of the n<-> region 21 in the wiring 2 is changed by the potential fluctuation of the wiring 1, thus increasing the density of integration of the integrated circuit and lowering power consumption thereof.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-158014A JPH012367A (en) | 1987-06-25 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-158014A JPH012367A (en) | 1987-06-25 | Semiconductor integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS642367A true JPS642367A (en) | 1989-01-06 |
JPH012367A JPH012367A (en) | 1989-01-06 |
Family
ID=
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5468162A (en) * | 1994-02-09 | 1995-11-21 | The Whitaker Corporation | Locking connector |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58215064A (en) * | 1982-06-07 | 1983-12-14 | Toshiba Corp | Lamination type semiconductor device |
JPS612357A (en) * | 1984-06-15 | 1986-01-08 | Hitachi Ltd | Semiconductor device |
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58215064A (en) * | 1982-06-07 | 1983-12-14 | Toshiba Corp | Lamination type semiconductor device |
JPS612357A (en) * | 1984-06-15 | 1986-01-08 | Hitachi Ltd | Semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5468162A (en) * | 1994-02-09 | 1995-11-21 | The Whitaker Corporation | Locking connector |
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