JPS6422057A - Manufacture of multi-layer planar type capacitor - Google Patents
Manufacture of multi-layer planar type capacitorInfo
- Publication number
- JPS6422057A JPS6422057A JP62179436A JP17943687A JPS6422057A JP S6422057 A JPS6422057 A JP S6422057A JP 62179436 A JP62179436 A JP 62179436A JP 17943687 A JP17943687 A JP 17943687A JP S6422057 A JPS6422057 A JP S6422057A
- Authority
- JP
- Japan
- Prior art keywords
- polysilicon
- capacitor
- manufacture
- type capacitor
- high degree
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 title abstract 5
- 238000004519 manufacturing process Methods 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 10
- 229920005591 polysilicon Polymers 0.000 abstract 10
- 230000010354 integration Effects 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To enable the high degree integration, by stacking three-dimensionally capacitor plates composed of polysilicon. CONSTITUTION:A P-type or an N-type silicon substrate, e.g., is used for a semiconductor 1. The title capacitor has a 4-layer polysilicon structure. Polysilicon B10 and A9, and polysilicon B10 and C11 are electrically insulated with an oxide film side-wall 7. The polysilicon A9 and the polysilicon C11 are brought into contact with each other by using polysilicon D12. Electric charge is stored in the polysilicon A9 and C11. Polysilicon E13 is the gate of a MOS transistor, and a drain 1D comes into contact with the polysilicon A9. By increasing the area of a capacitor plate in this fashion, the remarkably high degree integration is enabled as compared with prior planer type capacitors.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62179436A JPS6422057A (en) | 1987-07-17 | 1987-07-17 | Manufacture of multi-layer planar type capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62179436A JPS6422057A (en) | 1987-07-17 | 1987-07-17 | Manufacture of multi-layer planar type capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6422057A true JPS6422057A (en) | 1989-01-25 |
Family
ID=16065831
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62179436A Pending JPS6422057A (en) | 1987-07-17 | 1987-07-17 | Manufacture of multi-layer planar type capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6422057A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5036020A (en) * | 1990-08-31 | 1991-07-30 | Texas Instrument Incorporated | Method of fabricating microelectronic device incorporating capacitor having lowered topographical profile |
EP0449000A2 (en) * | 1990-03-08 | 1991-10-02 | Fujitsu Limited | Layer structure having contact hole for fin-shaped capacitors in DRAMS and method of producing the same |
US5145799A (en) * | 1991-01-30 | 1992-09-08 | Texas Instruments Incorporated | Stacked capacitor SRAM cell |
US5229314A (en) * | 1990-05-01 | 1993-07-20 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation |
US5498561A (en) * | 1990-11-30 | 1996-03-12 | Nec Corporation | Method of fabricating memory cell for semiconductor integrated circuit |
US5623457A (en) * | 1993-04-12 | 1997-04-22 | Sony Corporation | Photomagnetic disc drive system having a locking mechanism |
US5633181A (en) * | 1994-09-29 | 1997-05-27 | Nec Corporation | Fabrication method of semiconductor integrated circuit device having capacitors, bipolar transistors and igfets |
US5891766A (en) * | 1993-01-18 | 1999-04-06 | Semiconductor Energy Laboratory Co., Ltd. | MIS semiconductor device and method of fabricating the same |
-
1987
- 1987-07-17 JP JP62179436A patent/JPS6422057A/en active Pending
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0449000A2 (en) * | 1990-03-08 | 1991-10-02 | Fujitsu Limited | Layer structure having contact hole for fin-shaped capacitors in DRAMS and method of producing the same |
US6528369B1 (en) | 1990-03-08 | 2003-03-04 | Fujitsu Limited | Layer structure having contact hole and method of producing same |
US6144058A (en) * | 1990-03-08 | 2000-11-07 | Fujitsu Limited | Layer structure having contact hole, method of producing the same, fin-shaped capacitor using the layer structure, method of producing the fin-shaped capacitor and dynamic random access memory having the fin-shaped capacitor |
US5705420A (en) * | 1990-03-08 | 1998-01-06 | Fujitsu Limited | Method of producing a fin-shaped capacitor |
US5229314A (en) * | 1990-05-01 | 1993-07-20 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation |
US5036020A (en) * | 1990-08-31 | 1991-07-30 | Texas Instrument Incorporated | Method of fabricating microelectronic device incorporating capacitor having lowered topographical profile |
US5498561A (en) * | 1990-11-30 | 1996-03-12 | Nec Corporation | Method of fabricating memory cell for semiconductor integrated circuit |
US5145799A (en) * | 1991-01-30 | 1992-09-08 | Texas Instruments Incorporated | Stacked capacitor SRAM cell |
US6114728A (en) * | 1993-01-18 | 2000-09-05 | Semiconductor Energy Laboratory Co., Ltd. | MIS semiconductor device having a tapered top gate and a capacitor with metal oxide dielectric material |
US5891766A (en) * | 1993-01-18 | 1999-04-06 | Semiconductor Energy Laboratory Co., Ltd. | MIS semiconductor device and method of fabricating the same |
US6417543B1 (en) | 1993-01-18 | 2002-07-09 | Semiconductor Energy Laboratory Co., Ltd. | MIS semiconductor device with sloped gate, source, and drain regions |
US6984551B2 (en) | 1993-01-18 | 2006-01-10 | Semiconductor Energy Laboratory Co., Ltd. | MIS semiconductor device and method of fabricating the same |
US5623457A (en) * | 1993-04-12 | 1997-04-22 | Sony Corporation | Photomagnetic disc drive system having a locking mechanism |
US5633181A (en) * | 1994-09-29 | 1997-05-27 | Nec Corporation | Fabrication method of semiconductor integrated circuit device having capacitors, bipolar transistors and igfets |
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