JPS6399779A - Power converter - Google Patents

Abstract

PURPOSE:To prevent malfunction from being caused and shorten a TURN-OFF time, by short-circuiting a control terminal and an output terminal when each upper arm element is OFF. CONSTITUTION:A three-phase inverter circuit(one-phase component only is shown in figure) is composed of voltage driving type semiconductor elements 2a, 4a, an upper arm power source 16a, a transistor control circuit 8, a P channel MOSFET 9a, and the like. In this case, N channel MOSFETs 15-17, a resistor R, and a smoothing capacitor C are added. Then, to turn the upper arm element 2a ON, the FET 17 is turned ON by said control circuit 8, and the FET 16 is turned OFF, and as a result, the FET 9a is turned ON and specified voltage is applied to a control terminal(gate). When the element 2a is OFF, then the reverse against said action is performed. As a result, a the control terminal and the output terminal of the element 2a is short-circuited, and malfunction can be prevented from being caused.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention is applicable to power MO5FEF and IGBT (In5u
-1atI! d Ga(e RipOlar Tran
sister ) (7) Like! , 1 relates to a power conversion device configured by connecting positive drive type semiconductor elements in a bridge manner.

[Conventional technology]

FIG. 2 shows an example of a power conversion device (inverter) using transistors. In the figure, 1 is a DC voltage source, 2
a/~2c/and 4a/~4e/transistors, 3a~3C and 5a~5C are feedback diodes, 20a~20f are drive circuits, 218~21d
is the drive power supply, and To is the output terminal.

In such a system, upper arm element 2 a /~2
The potential of the output electrode (eminter; points ■, ■, and 0 in the figure) of c/ can be either the positive side potential or the negative side potential of the DC circuit. Therefore, the drive circuit 2 of each element of the upper arm
0a, 20b, and 20e need to be insulated from each other from those of other arms, and conventionally, as shown in the same figure,
A plurality of insulated net sources 21a 121b.

21C and drive circuits 20a, 20b, and 20C are required, making the circuit configuration complicated. When used as a semiconductor device all switch, a signal is not applied to its control terminal (the base of the transistor in the figure). 11
Then the element actually switches (on or off) -f1
['I: has a finite time delay.

In addition, when using λ5 in a bridge connection, the waiting time is required to prevent the elements of the upper and lower arms from being turned on at the same time. It is set up. In the conventional method of σ4, the element is turned off. It is necessary to insulate each OFF control signal and give it to the drive circuit, and during the above-mentioned waiting time, the circuit parts used in this insulation ([11, for example, photo coupler)]
The signal transmission time must also be taken into consideration. Since it is difficult to control the waiting time with high precision, driving a voltage-driven semiconductor device using the conventional 5-power method as described above will fully demonstrate the characteristics of the device that enable gastric speed switching. This means that you will not be able to take advantage of it.

Therefore, the applicant has proposed the following method (hereinafter also referred to as the proposed method). FIG. 3 is a schematic diagram showing the proposed method.

This is an example of a three-phase inverter circuit constructed by using voltage-driven semiconductor elements such as the above-mentioned IGBTs and switching elements, all of which are bridge-connected. In the figure, l is a DC voltage source, 2a to 2C and 4a to 4C are voltage driven semiconductor elements, 3a to 3C are connected, 5a to 5C are feedback diodes, 6a is a power supply for driving the upper arm, and 6b is a lower arm bolt. 7 is an inverter control circuit, 8 is a transistor control circuit, 9a to 9c are P-channel MOs.
S F E T.

1oa-toc and Lla~L], e is the resistance, L2
&-12c is a constant voltage diode and a To output terminal.

Each voltage-driven semiconductor element 2a, 2 forming the upper arm
The input terminal (called the collector) of bT2C is a DC voltage source l
A resistor 1oa, to)l connected to the upper arm drive power supply 6a is connected to the positive pole side (the negative pole side of the drive power supply 6&) between the collector and the control terminal (referred to as the gate).
, 108 and P channel/nek hK:)S FET9a*
9 b + 9 c are respectively connected 1f1. Ru. In addition, constant voltage diodes 12&, 12b, 12C are connected between the gates of each element 2&, 2b, 2C and the output terminal (called a mitter) to protect the tert from excessive pressure. . 8 transistor control circuits are supplied with power by the lower arm drive power source 6b, and receive control signals from the inverter control circuit 7, and the elements 2a to 2C are connected to the elements 4a to 4.
14-off. Turn it off.

For example, to turn on the upper element 29' (+-), turn on the P-channel MOSFET 9af by flowing the resistors 10a and 11 through the control circuit 8, and turn off the upper element 29' by turning off the MOSFET 9a Th. .

This also applies to the other upper elements 2 b and 2 c. On the other hand, regarding the lower arm elements 43 to 4C.

Directly apply positive voltage to these elements from the IlI control circuit 8 to turn them on, and set them to zero or negative voltage? I try to turn off the f'I-meeting by giving the f'I-meeting.

In this process, the proposed method focuses on the fact that the voltage-driven semiconductor (A-element) requires less driving power, connects the upper arm element and a P-channel MO3FET fJ in cascade, and turns on this P-channel MO3FET.

By making the OFF control @ possible to perform the driving at a common reference potential with the VJ control circuit of the lower arm element, and by inserting a voltage source into the cascade connection circuit, the ON voltage of the element is reduced. $, fru: sea urchin.

It should be noted that various methods as shown in FIG. 4, for example, can be considered as the drives 5016a and 6b in FIG. The figure (A) shows a method using a transformer, the figure (B) uses a U piezoelectric element, the figure (C) uses a solar cell, and the figure () shows a method using a constant voltage diode. .

For the upper arm element, see (A) to (C) in the same figure.
For the lower arm element, the method shown in the same figure (A) ~
) are all applicable. In addition, in the 41st case, 31 is a transformer, 32 is a rectifier, and 33 is a converter/condenser.
34 is a piezoelectric element, 35 is a light emitting element, 36 is a solar cell, 37 is a diode, 38 is a resistor, and 39 is a constant voltage diode.

[Problem that the invention seeks to solve]

By the way, the switching element used in the proposed method has a problem in that the parasitic transistor turns off.
The safe operating area SOA when turning on/off becomes narrower (M
In the case of an OSFET), a so-called launch amplifier phenomenon occurs, which makes it impossible to control the gate (in the case of an IGBT). It has been suggested that the latter is more likely to occur when the switching element is turned off than when it is turned on. It has also been found that this launch amplifier phenomenon at turn-off can be suppressed by inserting all the resistors between the gate and emitter of the fPIJ element to cause turn-off.

However, there is a large d between the collector and emitter of the device.
When a voltage with V/dt (voltage rise rate) t is applied, the launch-up prevention resistor inserted in this new capacitor increases the gate-emitter voltage, which turns on the engineered element. I'm afraid. In other words, in a power conversion device such as an inverter, a switching element that is turned off has an average value of 11 av/dt at the time of reverse recovery of its feedback diode.
However, when the device is turned on by this large voltage, the upper and lower arms are short-circuited, causing a serious accident.

In the case of the former MOSFET (also in the case of ID), in order to prevent the parasitic transistor from turning on, the method of connecting all resistors in series with the gate to slow down the turn-off is taken, so the same period of 91 as above occurs.However, in the proposed method, this Countermeasures against this problem are still insufficient. Therefore, the overall purpose of the present invention is to completely prevent such malfunctions in the proposed system and to shorten the turn-off time.

[Means to solve all problems]

For the 'α force converter configured as in the proposed method, when each upper arm element is turned off, its respective control terminal (gate)
A short-circuit means is provided to short-circuit tL between the output terminal (emitter) and the output terminal (emitter).

[Effect]

Due to the short circuit between the gate and emitter of the element when it is off, dv, /dtK! during reverse recovery of the feedback diode connected anti-parallel to the element. ru1 mixed o/? Prevention and turn-off time? Shorten.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

This shows one phase of the inverter circuit, and includes N-channel MOSFETs 15, 16, 17, and 1. Otherwise, it is exactly the same as FIG. 3.

The operation will be explained.

First, in order to turn on the upper arm element 2a'2, the transistor control circuit 8 turns on the N-channel MO3-FET17.
' off, 16'lil' off, which turns P-channel MO8FET!1a 'e on, resistor 11
The control terminal (gate) and output terminal (
This is done by applying a predetermined voltage between the two emitters. On the other hand, when element 2a is off, MO8FET16t is on,
Elimination is performed by turning off the 17-karat gold and completely removing the voltage applied to the element 2a as described above.

At this time, MO3FET1G is on, and this causes current to flow through the ninth N-channel MO8.
FET 15 is turned on, resulting in a short circuit between the control terminal and output terminal of element 2a. , element 2a
At the time of reverse recovery of the feedback diode 3a connected in antiparallel to the
Even if a large dv, /dt is applied to element 2a, the voltage at its control terminal will not rise;
It is possible to completely prevent malfunctions in which a is turned on, and the turn/off time can also be shortened. Note that the turning on and off of the lower arm element is controlled by the output from the transistor control circuit 8, and is directly controlled as in the case of FIG. 3.

〔Effect of the invention〕

According to the present invention, a short-circuiting means for short-circuiting between the control terminal (gate) and the output terminal (emitter) of each upper arm element when each upper arm element is turned off is provided in the power converter configured as in the proposed method. This prevents malfunctions such as dv/dtK! during reverse recovery of the nine feedback diodes connected in anti-parallel with the element, and has the advantage of shortening the turn-off time.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the invention, and FIG. 2 is a circuit diagram using transistors for 7t1! A diagram showing a general example of a force transducer, Figure 3 is the proposed method? Is the schematic diagram shown in Figure 4 a specific example of the power supply for the upper and lower arms? FIG. Symbol explanation l...DC voltage source, 2a to 2c, 4a to 4C... Company voltage drive type semiconductor element, 2a/~2C', 4JL'
~4 C/...transistor, 3a~3c, 5
a~5C, 37... Diode, 6a... Upper arm drive @Q, 5 b... Lower arm drive power supply, 7
... Inverter control circuit, 8... Transistor 1I
iIli wholesale circuit, 9a, 9b, 9cmp f4
ynel MOSFET, lOl ~10C, 1l
a-11c, 38. R...Resistance, 12a-12C, 39... Constant voltage diode, 15.16.17...N-f-yannel hi
OsFET12011~20f...driver circuit, 21&
~2Ld... Drive power supply, at... Transformer, 32.
...liI[Z, 33. c... Capacitor, 34...
- Piezoelectric element, 35... Light emitting element, 36... Solar cell.

Claims (1)

[Claims] The negative terminal of the upper arm driving power supply is connected to the input terminal of each element constituting the upper arm of the voltage-driven semiconductor element bridge-connected to the power supply, and the positive terminal and each of the upper arm Each P channel MO is connected between the control terminal of the arm element.
SFET and each of these P-channel MOSFETs
A power conversion device that performs on/off control using a common reference potential with a drive control circuit that drives lower arm elements on and off, wherein when each upper arm element is turned off, its respective control terminal and output terminal A power conversion device characterized by comprising a short-circuit means for short-circuiting between the two.