JPH10243647A - Power unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To drive a switching element, with a small number of parts, by driving the switching element, using the circuit of a transistor connected to a totem pole. SOLUTION: When the voltage gets over the output voltage, being induced by the secondary coil 5B of a voltage, currents ld1 and ld2 flow to a capacitor 21 through the parasitic diodes 40A and 50A of MOS-FETs 40 and 50. The currents ld1 and ld2 flow in the primary coils 41A and 51A of the transformer, and induce the voltage geared to the currents. Npn transistors 43 and 53 and pnp transistors 44 and 54 are turned on and off and supply the gate of the MOSFETs 40 and 50 with drive signals, by supplying the bases of the npn transistors 43 and 53 and the pnp transistors 44 and 54 connected to the totem pole each through resistors 42 and 52 with this induced voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device suitable for use as, for example, a power supply of a personal computer driven by DC obtained by rectifying an AC input.

[0002]

2. Description of the Related Art For example, in a power supply of a personal computer driven by DC in which an AC input is rectified, a power supply device such as a so-called DC-DC converter is used in order to obtain a necessary driving voltage internally. That is, FIG. 2 shows a configuration of an example of such a power supply device.

In FIG. 2, a positive terminal of a DC 70 has two switching transistors 71 connected in series,
It is connected to the negative terminal of the DC 70 through the collector-emitter 72. The midpoint between these transistors 71 and 72 is connected to one end of the primary coil 5A of the voltage conversion transformer 75 through the coil 3A of the saturable reactor transformer 73 and the resonance capacitor 74. The other end of the primary coil 5A is connected to the negative end of DC 70. Further, the midpoint between the transistors 71 and 72 is
Is connected to the negative end of

Further, the collector of the transistor 71 is connected to the base of the transistor 71 through a resistor 77,
The base of the transistor 71 is connected to the emitter of the transistor 71 through a series circuit of a zener diode 78 in the forward direction and a diode 79 in the reverse direction. Further, the base of the transistor 71 is a resistor 80, a capacitor 81
Is connected to the emitter of the transistor 71 through a series circuit of a coil 3B of the saturable reactor transformer 73 and a parallel circuit of the capacitor 82.

Further, the collector of the transistor 72 is connected to the base of the transistor 72 through a resistor 83,
The base of the transistor 72 is connected to the emitter of the transistor 72 through a series circuit of a zener diode 84 in the forward direction and a diode 85 in the reverse direction. Further, the base of the transistor 72 includes a resistor 86 and a capacitor 87.
Is connected to the emitter of the transistor 72 through a series circuit of a parallel circuit of the coil 3C of the saturable reactor transformer 73 and the capacitor 88.

[0006] One end and the other end of the secondary coil 5B of the voltage conversion transformer 75 are connected to each other through forward diodes 89 and 90 for rectification.
Further, a smoothing capacitor 91 is connected between the connection point and the intermediate tap of the secondary coil 5B. The positive terminal and the negative terminal of the output terminal 92 are led out from both ends of the capacitor 91. Further, the positive terminal of the output terminal 92 is connected to the control coil 3D of the saturable reactor transformer 73 through the error amplifier 93.

In this device, the switching transistors 71 and 72 are turned on and off alternately by self-excited oscillation, so that a substantially sine-wave current flows through the primary coil 5A of the voltage conversion transformer 75. A desired voltage is extracted from the secondary coil 5B. Further, the extracted voltage is subjected to double-wave rectification through diodes 89 and 90, and the rectified voltage is smoothed by a capacitor 91 and extracted to an output terminal 92.

[0008] Further, a variation from a desired voltage of the voltage taken out at the + terminal of the output terminal 92 is detected by the error amplifier 93, and the variation is supplied to the control coil 3 D of the saturable reactor transformer 73. As a result, the waveforms of the signals extracted to the coils 3A to 3C of the saturable reactor transformer 73 are changed, the switching frequencies of the transistors 71 and 72 are changed, and the voltage extracted to the positive terminal of the output terminal 92 is equal to the desired voltage. Control is performed so that

Thus, in the above-described device, a stabilized desired voltage can be taken out to the output terminal 92. The extracted voltage is used as, for example, a power source of a personal computer driven by DC.

However, in the above-described power supply device, diodes 89 and 90 for rectifying the secondary side of the voltage conversion transformer 75 are used.
Loss occurs due to the forward drop voltage Vf. That is, the forward drop voltage Vf of such a diode is generally about 0.45 V, and the forward drop voltage Vf causes the above-described device to be 1.11 × Io × Vf [W] (where Io is Output current [A]) is lost.

The loss due to the secondary side rectifying diodes 89 and 90 is, for example, when the output current Io is 10
In [A], it becomes 5 [W], and in 20 [A], it becomes as much as 10 [W]. In particular, in a power supply requiring a low voltage and a large current such as a personal computer, the ratio of loss to output becomes large. It will be.

[0012]

In order to solve such a conventional problem, the applicant of the present invention has previously performed synchronous rectification using a MOS-FET as secondary rectification of a voltage conversion transformer. According to this, a power supply device capable of greatly reducing the loss due to rectification on the secondary side by using a MOS-FET having a low on-resistance is proposed (Japanese Patent Application No. Hei 8 (1996) -19764). No.-315049: hereinafter referred to as prior application).

FIG. 3 is a block diagram showing a configuration of an example of a power supply device to which the above-mentioned prior application is applied.

In FIG. 3, D is obtained by rectifying the AC input.
The positive terminal of C100 is connected to the negative terminal of DC100 through the collector and emitter of two switching transistors 1, 2 connected in series. The middle point of these transistors 1 and 2 is the coil 3 of the supersaturated reactor transformer 3.
A, one of the voltage conversion transformers 5 through the resonance capacitor 4
It is connected to one end of the secondary coil 5A. The other end of the primary coil 5A is connected to the negative end of DC100. Further, the midpoint between the transistors 1 and 2 is
Connected to the minus end of C100.

The collector of the transistor 1 is connected to the base of the transistor 1 through a resistor 7, and the base of the transistor 1 is connected to a zener diode 8 in the forward direction.
Is connected to the emitter of the transistor 1 through a series circuit of a diode 9 in the opposite direction. Further, the base of the transistor 1 is connected to the emitter of the transistor 1 through a series circuit of a resistor 10, a capacitor 11, and a parallel circuit of a coil 3B of the saturable reactor transformer 3 and a capacitor 12.

Further, the collector of the transistor 2 is connected to the base of the transistor 2 through a resistor 13, and the base of the transistor 2 is connected to the emitter of the transistor 2 through a series circuit of a forward Zener diode 14 and a reverse diode 15. You. Further, the base of the transistor 2 is connected to the emitter of the transistor 2 through a series circuit of the resistor 16 and the capacitor 17 and the parallel circuit of the coil 3C of the saturable reactor transformer 3 and the capacitor 18.

One end and the other end of the secondary coil 5B of the voltage conversion transformer 5 are connected to each other through the source and drain of N-channel MOS-FETs 19 and 20, respectively. Further, a smoothing capacitor 21 is connected between the connection point and an intermediate tap of the secondary coil 5B. The positive terminal and the negative terminal of the output terminal 22 are led out from both ends of the capacitor 21. Further, the positive terminal of the output terminal 22 is connected to the control coil 3D of the saturable reactor transformer 3 through the control circuit 23.

In this device, when the switching transistors 1 and 2 are alternately turned on and off by self-oscillation, a substantially sinusoidal current flows through the primary coil 5A of the voltage conversion transformer 5, and A desired voltage is extracted from the secondary coil 5B. Further, the extracted voltages are connected to each other through MOS-FETs 19 and 20.

Here, these MOS-FETs 19 and 20
Are turned on and off by drive circuits 24 and 25, respectively. For example, in the example shown in the drawing, synchronous control is performed such that the transistor is turned on only during a period in which a current flows from the capacitor 21 toward the coil 5B. Thereby, the secondary coil 5B
Is rectified in both directions, and the rectified voltage is smoothed by the capacitor 21 and output to the output terminal 22.

The control circuit 23 detects a variation of the voltage taken out from the + terminal of the output terminal 22 from the desired voltage, and supplies the variation to the control coil 3D of the supersaturated reactor transformer 3. As a result, the waveforms of the signals taken out to the coils 3A to 3C of the saturable reactor transformer 3 are changed, the switching frequency of the transistors 1 and 2 is changed, and the voltage taken out at the positive terminal of the output terminal 22 is equal to the desired voltage. Control is performed so that

Thus, in the above-described device, a stabilized desired voltage can be taken out to the output terminal 22. Further, the extracted voltage is used as a power source of a personal computer driven by, for example, DC.

In the above-described device, rectification on the secondary side of the voltage conversion transformer 5 is performed by synchronous rectification by synchronous control of the MOS-FETs 19 and 20, respectively. Therefore, in this case, the MOS-FE for secondary side rectification is used.
Loss occurs due to the on-resistance Ron of T19 and T20.

That is, such an on-resistance Ron is, for example, about 7 mΩ in a low on-resistance MOS-FET.
In the device described above, a loss of 1.11 × Io × 1.11 × Io × Ron [W] occurs due to the on-resistance Ron.

Then, the MOS-
The loss caused by the FETs 19 and 20 can be kept at about 0.86 [W] when the output current Io is 10 [A] and about 3.45 [W] when the output current Io is 20 [A], and particularly low as in a personal computer. It is a power supply that requires a large voltage and a large current, and can greatly reduce the ratio of loss to output.

That is, in FIG. 4, a straight line A represents, for example, a forward drop voltage Vf = 0.
The situation in which a loss [W] with respect to a current [A] occurs when a 45 V diode is used is shown. Curve B is 2
For the element for rectification on the secondary side, for example, an MO having an on-resistance Ron = 7 mΩ
This shows a situation in which a loss [W] with respect to a current [A] occurs when an S-FET is used.

Therefore, in this device, synchronous rectification is performed by using a MOS-FET as a secondary rectifier of the voltage conversion transformer, so that a MOS-FE having a low on-resistance is obtained.
By using T, the loss in the secondary side rectification can be greatly reduced.

As a result, in the conventional device, the ratio of the loss to the output is increased due to the forward drop voltage of the secondary-side rectifying diode. Low voltage,
When a power supply with a large current is required, the loss in the secondary side rectification can be greatly reduced, and an efficient switching power supply can be realized.

By the way, in the above-mentioned device, the secondary side rectifying element is originally a secondary side coil 5 of the voltage converting transformer 5.
A current must flow only in the direction from B to charge the smoothing capacitor 21. However, in the above-described device, when an ON-voltage is applied to the gate of the MOS-FET, the current between the drain and the source becomes equivalent to that of a resistor, so that current can flow in both directions.

Therefore, in the above device, the MOS-FE
If the timing of applying the on-voltage to the gate of T is deteriorated, a discharge current flows from the capacitor 21 to the secondary coil 5B, so that not only energy cannot be effectively transmitted to the load side, but also heat generation and noise of the MOS-FET due to the reverse current. This may lead to an increase in primary-side switching loss.

Therefore, in order to accurately control the timing of applying the ON voltage to the gate of such a MOS-FET, for example, a circuit as shown in FIG. 5 is used. In the following description, the MOS-FET 19 for secondary rectification,
Although only one of the lower circuits 20 is shown, the circuit configuration and the operation of the upper and lower MOS-FETs are the same.

In FIG. 5, a primary coil 31A of a current detecting transformer 31 is provided in series with the MOS-FET 20. A resistor 32 for detection is connected between both ends of a secondary coil 31B of the transformer 31 for current detection, and a voltage of the resistor 32 is connected to a diode 3 for a limiter.
The signals are detected by the comparator circuit 35 through the circuits 3 and 34.

That is, one end of the resistor 32 is connected to a reference voltage source 36 via diodes 33 and 34, and the voltage of the reference voltage source 36 and the voltage of the other end of the resistor 32 are compared by a comparator circuit 35. Detection is performed when the voltage at the other end becomes equal to or more than a predetermined value. This detection signal is supplied to the gate of the MOS-FET 20 through the buffer circuit 37.

Therefore, in this circuit, for example,
The collector current I _C of the transistor 1 on the next side is A
6, the voltage B in FIG. 6 is induced in the secondary coil 5 </ b> B of the voltage conversion transformer 5. When this voltage becomes higher than the charging voltage of the capacitor 21, a charging current flows to the capacitor 21 through the parasitic diode 20A of the MOS-FET 20.

Further, when the charging current flows through the primary coil 31A of the current detecting transformer 31, a voltage is induced in the secondary coil 31B. The output voltage is detected by the comparator circuit 35, and when the output voltage exceeds a predetermined value, the gate voltage Vgs as shown in FIG.
Applied to FET 20;

When the charging current decreases, the output of the comparator circuit 35 is inverted and the buffer circuit 37
, The gate capacitance of the MOS-FET 20 is discharged, and the MOS-FET 20 is turned off. At this time, the charging current of the capacitor 21 is not zero,
This current is supplied to the parasitic diode 20A of the MOS-FET 20.
Flowed through.

Thus, the MOS-FET 20 has
For example the drain current I _D as shown in D of FIG. 6 is flowed. That is, this MOS-FET 20 is
It is turned on after the charging current to 1 starts flowing, and turned off before the charging current becomes zero. And this MOS-FET
During the period when the switch 20 is turned on, charging with low loss is performed via the low on-resistance.

The operation of the MOS-FET 19 is exactly the same. That is, for example, FIG.
The operation of the MOS-FET 19 is performed as shown in FIGS. 7C and 7D in a manner inverted to the operation of the MOS-FET 20 shown in FIGS. Also in this case, the MOS-FET 19
Is turned on after the charging current to the capacitor 21 starts flowing, and turned off before the charging current becomes zero.

Therefore, in this circuit, the MOS-FET
Is turned off before the charging current becomes zero, so that, for example, the turn-off timing is delayed and a reverse current does not flow. This allows the MOS to operate under any operating conditions.
-The ON period of the FET can flow only the current in the direction of the charging current, and the problem caused by the generation of the reverse current can be solved.

That is, in the device of the prior application, synchronous rectification is performed by using a MOS-FET as the secondary rectification of the voltage conversion transformer, so that a low on-resistance M
By using the OS-FET, the loss due to the secondary rectification can be significantly reduced.

As a result, in the conventional device, the ratio of the loss to the output is increased due to the forward drop voltage of the secondary-side rectifying diode. Low voltage,
When a power supply with a large current is required, the loss in the secondary side rectification can be greatly reduced, and an efficient switching power supply can be realized.

However, in the above-described apparatus, for example, FIG.
The drive circuit shown in FIG. 1 requires a power supply circuit for forming the reference voltage source 36, a comparator circuit 35, a buffer circuit 37, and other circuits. In the case of dual-wave rectification, two sets of these circuits are required. As a result, the circuit scale becomes much larger than that of the conventional diode rectifier circuit.

For this reason, it is difficult to reduce the size, weight, and cost of the device on which such a power supply device is mounted.

The present application has been made in view of such a point, and the problem to be solved is that in the conventional device, the driving of the switching element requires the use of a power supply circuit, a comparator circuit, a buffer circuit and the like. A circuit is required, the circuit scale is large, and it hinders downsizing, weight reduction, cost reduction, and the like of equipment to be mounted.

[0044]

Therefore, in the present invention, the driving of the switching element is performed by using a circuit of a transistor connected with a totem pole. According to this, the driving of the switching element is performed. Can be performed with a small number of components, and downsizing, weight reduction, cost reduction, and the like of a device to be mounted can be realized.

[0045]

DESCRIPTION OF THE PREFERRED EMBODIMENTS That is, the present invention has a half-bridge configuration using two switching elements, a resonance capacitor and a voltage conversion transformer are provided at the midpoint between the two switching elements, and a voltage conversion transformer is provided. In a power supply device that performs synchronous rectification using a switching element as a secondary side rectification of a transformer, a signal obtained by detecting a current flowing through a switching element is used as a drive signal of the secondary side synchronous rectification, and the detection signal is connected to a totem pole. It is supplied to a switching element using a transistor circuit.

Hereinafter, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a main part of an example of a power supply device to which the present invention is applied. Although FIG. 1 shows only the circuit on the secondary side of the voltage conversion transformer 5, the circuit on the primary side of the voltage conversion transformer 5 is the same as that in FIG.

In FIG. 1, one end and the other end of the secondary coil 5B of the voltage conversion transformer 5 are N
The channels are connected to each other through the source-drain of the MOS-FETs 40 and 50. Further, a smoothing capacitor 21 is connected between the connection point and an intermediate tap of the secondary coil 5B. The positive terminal and the negative terminal of the output terminal 22 are led out from both ends of the capacitor 21.

That is, in this device, for example, the above-mentioned switching transistors 1 and 2 are turned on and off alternately by self-oscillation, so that the voltage conversion transformer 5
A substantially sine-wave current flows through the primary coil 5A, and a desired voltage is extracted from the secondary coil 5B. Further, the extracted voltages are connected to each other through MOS-FETs 40 and 50.

In this device, the MOS-
Primary coils 41A and 51A of current detecting transformers 41 and 51 are provided in series with the FETs 40 and 50, respectively. Further, one ends of secondary coils 41B and 51B of the current detecting transformers 41 and 51 are connected to resistors 42 and 5 respectively.
2 are connected to the bases of npn transistors 43 and 53 and pnp transistors 44 and 54 which are totem-pole connected through tompole connection.

That is, these transistors 43, 4
The emitters of transistors 53 and 54 are connected to each other, and the emitters of transistors 53 and 54 are connected to each other. The connection points of these emitters are connected to the gates of the MOS-FETs 40 and 50, respectively.

Further, the collectors of the transistors 44 and 54 are connected to the other ends of the secondary coils 41B and 51B of the current detecting transformers 41 and 51, respectively. The collectors of transistors 43 and 53 are connected to power supply voltage Vcc, respectively.
Are connected to the terminals 45 and 55. The power supply voltage Vcc
Are the secondary coils 41B of the transformers 41 and 51, for example.
51B.

In this circuit, when a voltage is induced in the secondary coil 5B of the voltage conversion transformer 5 and this voltage becomes higher than the output voltage V0, for example, the MOS-FET 4
The charging currents Id1 and Id2 flow through the capacitor 21 via the 0 and 50 parasitic diodes 40A and 50A, respectively.

On the other hand, the currents Id1 and Id2 flow through the primary coils 41A and 51A of the transformers 41 and 51, respectively, and a voltage corresponding to the current is induced in the secondary coils 41B and 51B of the transformers 41 and 51. You. These induced voltages are supplied to the bases of the transistors 43, 44, 53, 54 via the resistors 42, 52, respectively, so that the transistors 43, 44, 53, 5
4 are turned on and off alternately, and the MOS-FETs 40, 5
A drive signal is supplied to the 0 gate.

Therefore, in this device, by performing synchronous rectification using a MOS-FET as a secondary rectifier of the voltage conversion transformer, a MOS-FE having a particularly low on-resistance is obtained.
By using T, the loss in the secondary side rectification can be greatly reduced.

In this case, according to the circuit described above, M
The OS-FET can be driven only by a small number of transistors and resistors, and the number of components can be reduced, so that the mounted device can be reduced in size, weight, cost, and the like.

Thus, in the conventional device, the power supply circuit,
According to the present invention, the number of components is reduced to reduce the size, weight, and cost of equipment to be mounted. Can be realized.

As described above, according to the power supply device described above, a half bridge configuration using two switching elements is provided.
A resonance capacitor and a voltage conversion transformer are provided at the middle point of the stone switching element, and a secondary side synchronous rectification drive is performed in a power supply device that performs synchronous rectification using a switching element as secondary rectification of the voltage conversion transformer. By using a signal that detects the current flowing through the switching element as a signal and supplying the detection signal to the switching element using a totem-pole-connected transistor circuit, the loss in the secondary-side rectification is significantly reduced, An efficient switching power supply can be realized, and the number of components can be significantly reduced, so that the mounted device can be reduced in size, weight, cost, and the like.

[0058]

According to the present invention, synchronous rectification is performed by using a MOS-FET as a secondary rectifier of a voltage conversion transformer, and in particular, by using a low on-resistance MOS-FET, a secondary rectifier is used. The rectification loss can be greatly reduced.

In this case, according to the circuit of the present invention, the MOS-FET can be driven only by a small number of transistors and resistors, and the number of parts can be reduced, and the size of the mounted equipment can be reduced. It is possible to realize a reduction in weight, cost, and the like.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an example of a power supply device to which the present invention is applied.

FIG. 2 is a configuration diagram of a conventional power supply device.

FIG. 3 is a configuration diagram of a power supply device of the prior application.

FIG. 4 is a diagram for explaining this.

FIG. 5 is a configuration diagram of a main part of the power supply device of the prior application.

FIG. 6 is a diagram for explaining the operation.

FIG. 7 is a diagram for explaining the operation.

[Explanation of symbols]

5 voltage conversion transformer, 21 capacitor, 22 output terminal, 40, 50 MOS-FET, 41, 51 current detection transformer, 42, 52 base resistor, 43, 4
4,53,54 Totem pole connected transistors, 45,55 power supply terminals

Claims (2)

[Claims] 1. A half-bridge configuration using two switching elements, wherein a resonance capacitor and a voltage conversion transformer are provided at a midpoint of the two switching elements, and a secondary side of the voltage conversion transformer. In a power supply device that performs synchronous rectification using a switching element as rectification, a signal that detects a current flowing through the switching element is used as a drive signal of the secondary-side synchronous rectification, and the detection signal is a signal of a totem-pole-connected transistor. A power supply device, wherein the power is supplied to the switching element using a circuit. 2. The power supply device according to claim 1, wherein a current detection transformer is connected in series with said switching element to detect a current flowing through said switching element.