JPS639195A - Manufacture of multilayer interconnection board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention is applicable to multilayer arrangement! The present invention relates to six methods of manufacturing FJ substrates, and particularly relates to a method for improving the contact properties of openings (through holes) when an organic insulating film such as polyimide is used as an interlayer insulating film.

[Prior art and its problems] As semiconductor technology progresses, semiconductor devices continue to become more highly integrated, and as a result, there is a growing demand for smaller wiring areas, and multilayer wiring patterns are essential. It is becoming.

As described above, as wiring patterns become more multilayered, the higher the layer, the more the surface level difference increases, making it difficult to obtain sufficient pattern accuracy. Therefore, various studies are being carried out to flatten the surface.

Among these, a method of using an interlayer insulating film such as a polyimide film instead of a non-separable insulating film such as a silicon oxide group film formed by a CVD method is attracting attention.

This polyimide film is extremely easily formed on the substrate surface by a coating method such as a spin cord, and since it has fluidity during coating, the surface after coating tends to be flat. Furthermore, since it can be formed without going through a high-temperature process, it can be used even in cases where the lower layer contains a low melting point metal such as aluminum, so it is becoming widely used.

Conventionally, when using this polyimide film as an interlayer insulating film, through holes were formed as follows.

First, as shown in FIG. 5(a), polyimide Wi3 is applied to the substrate 1 on which the first wiring layer 2 is formed.

Furthermore, as shown in FIG. 5(b), a photoresist 4 is applied to the surface and selectively exposed to light through a photomask 5.

Then, as shown in FIG. 5fc), it is immersed in an etching solution such as sodium silicate, the resist is developed, the polyimide film is selectively removed, and a through hole h is formed.

Then, as shown in FIG. 5(d), after removing the resist pattern, a second wiring layer 6 is formed on this upper layer, and the first wiring layer 6 is connected to the second wiring layer through the through hole h. However, with this method of forming through-holes using only wet etching, the polyimide inside the through-holes cannot be completely removed, leaving a very thin organic film O, etc. There was a problem that ohmic contact between wiring layers could not be established.

On the other hand, when attempting to pattern a polyimide film by dry etching, the etching selectivity with the resist is low, resulting in a decrease in pattern accuracy, and it is difficult to remove the resist pattern after dry etching, making it difficult to put it into practical use. has many problems.

Therefore, a method has been adopted in which after forming a through hole by wet etching, plasma cleaning using oxygen plasma is performed to remove the oxide film O and the like remaining on the surface inside the through hole.

However, since this method requires 8 vacuum chambers, it is difficult to apply to large-area substrates and also increases manufacturing time, which is a major obstacle to simplifying the process and reducing manufacturing costs.

Furthermore, when forming fine patterns, there is also the problem of reduced reliability due to damage caused by plasma during the plasma cleaning process.

The present invention was made in view of the above-mentioned circumstances, and is a multilayer structure that is easy to manufacture and has high reliability! The purpose is to provide a substrate.

[Means for Solving the Problem 1] Therefore, in the present invention, after forming an organic insulating film such as polyimide and drilling through holes using a wet etching method, the surface of the substrate is irradiated with ultraviolet rays before forming a wiring layer. I try to do that.

[Function] By irradiating the substrate surface with ultraviolet rays, the n-based film remaining in the through holes can be removed and a clean surface can be exposed, so if a wiring layer is formed on top of this, a good wiring layer can be formed. You can gain contact.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIGS. 1(a) to 1(f) are diagrams showing the process of forming a wiring board according to an embodiment of the present invention.

First, as shown in FIG. 1(a), a first
After forming a chromium layer as the wiring layer 2 and patterning it by the usual photolithography method, a polyimide film 3 is applied to a thickness of 1.5 m and baked at 135° C. for 30 minutes.

Subsequently, as shown in FIG. 1(b), a photoresist 4 having a thickness of 1 m is applied and exposed using a photomask 5 having a predetermined pattern to form a pattern latent image G.

Thereafter, as shown in FIG. 1C, the photoresist 4 and the polyimide film 3 are simultaneously developed and etched using a sodium silicate solution to form through holes h. The etching time at this time was 60 seconds.

After the resist is peeled off, the polyimide film is completely cured through heat treatment at 350° C. for 1 hour. At this time, a thin amount of residue 0 remains inside the through hole.

After that, as shown in FIG. 1(d), ultraviolet rays are applied to the surface of the substrate.
Irradiate (2) for 120 seconds to clean the through hole. Here, six 25W low-pressure mercury lamps were used for ultraviolet irradiation.

After removing the residue in the through hole h in this way, an aluminum pattern is formed as the second wiring layer 6 as shown in FIGS. 1(e) and 1(f). Here the first
FIG. 1(f) is a sectional view taken along the line AA in FIG. 1(e). Further, the pattern width W1 of the first wiring layer and the pattern width W2 of the second wiring layer are each 901!11°100°, and the through hole is a rectangle with one side W3 = 70ts.

The first wiring layer and second wiring layer of the wiring board thus formed are connected to terminals, voltage is applied, and the current - lightning pressure (
Figure 2 shows the results of measuring the 1-V) characteristics. Here, the vertical axis is current and the horizontal axis is voltage.

For comparison, FIGS. 3 and 4 show the IV characteristics when the through-holes were not cleaned and when plasma cleaning was performed using oxygen plasma, respectively.

As is clear from the comparison between FIG. 2, FIG. 3, and FIG. 4, the wiring board formed by the method of the present invention has significantly improved contact between the first wiring layer and the second wiring layer in the through hole. It can be seen that this has improved.

Further, according to the method of the present invention, since it is only necessary to irradiate ultraviolet rays, no special equipment is required, and cleaning can be easily performed in a short time.

In the embodiments, an interlayer insulating film has been described, but it goes without saying that the present invention can also be applied to forming a contact hole in an element region in an insulating film formed on the surface of a substrate.

Furthermore, although a polyimide film was used as the insulating film in the embodiment, other organic insulating films are also applicable.

[Effects] As explained above, according to the present invention, when forming through holes in an organic insulating film, ultraviolet rays are irradiated after the through holes are drilled in a wet etching process. Multilayer wiring with good ohmic contact and high reliability can be easily obtained.

[Brief explanation of drawings]

FIGS. 1(a) to (f) are diagrams showing the manufacturing process of a multilayer wiring board according to an embodiment of the present invention, and FIG. 2 is a diagram showing the current-voltage characteristics of a multilayer wiring formed by the method of the embodiment of Kikomei. figure,
3 and 4 are diagrams showing the current-voltage characteristics of a multilayer In board formed by the conventional method, and FIG. 5(a)
7(d) are manufacturing process diagrams of a conventional multilayer wiring board. Figure 2 Figure 3 Figure 4 Figure 1 (Q) Figure 1 (b) Figure 1 (C) Figure 1 (d) Figure 1 (e) Figure 1 (f)

Claims (2)

[Claims] (1) In a method for manufacturing a multilayer wiring board in which an upper wiring layer and a lower wiring layer are connected through an opening in an interlayer insulation film made of an organic insulation film, an organic insulation film is formed on the lower wiring layer. However, for this, there is a hole (
A method for producing a multilayer wiring board, the method comprising: after drilling a through-hole, and prior to forming an upper wiring layer, a cleaning step of removing residue in the hole by irradiating the surface of the board with ultraviolet rays. (2) The method for manufacturing a multilayer wiring board according to claim (1), wherein the organic insulating film is a polyimide film.