JPS6387839U - - Google Patents

Info

Publication number
JPS6387839U
JPS6387839U JP18304186U JP18304186U JPS6387839U JP S6387839 U JPS6387839 U JP S6387839U JP 18304186 U JP18304186 U JP 18304186U JP 18304186 U JP18304186 U JP 18304186U JP S6387839 U JPS6387839 U JP S6387839U
Authority
JP
Japan
Prior art keywords
mold case
circuit device
enclosed
stopper part
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18304186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18304186U priority Critical patent/JPS6387839U/ja
Publication of JPS6387839U publication Critical patent/JPS6387839U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の印刷基板にリード端子を接
続した平面図である。第2図は、第1図をケース
に入れた場合の平面図aと側面図bである。第3
図は、第2図をPWBに実装した時の平面図であ
る。第4図、第5図は、従来のケースに入れた場
合の各平面図aと側面図bを示す。 1……セラミツク基板、2……導電体、3……
はんだ、4,14……ストツパー部、5,15,
25,35,45……リード端子、16,26,
36,46……ケース、27……PWB、38,
48……ケースの突出部又は突起部。
FIG. 1 is a plan view of lead terminals connected to the printed circuit board of the present invention. FIG. 2 is a plan view a and a side view b of the case shown in FIG. 1 when it is placed in a case. Third
The figure is a plan view when FIG. 2 is mounted on a PWB. FIGS. 4 and 5 show a plan view a and a side view b, respectively, when the device is placed in a conventional case. 1... Ceramic substrate, 2... Conductor, 3...
Solder, 4, 14...Stopper part, 5, 15,
25, 35, 45...Lead terminal, 16, 26,
36, 46...Case, 27...PWB, 38,
48... Protrusion or protrusion of the case.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶縁体の基板上に電気回路が形成された印刷基
板にリード端子を取付け、モールドケースに封入
した混成集積回路装置において、リード端子のス
トツパー部をモールドケースより突出させた事を
特徴とする混成集積回路装置。
A hybrid integrated circuit device in which lead terminals are attached to a printed circuit board with an electric circuit formed on an insulating substrate and enclosed in a mold case, characterized in that the stopper part of the lead terminal protrudes from the mold case. circuit device.
JP18304186U 1986-11-27 1986-11-27 Pending JPS6387839U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18304186U JPS6387839U (en) 1986-11-27 1986-11-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18304186U JPS6387839U (en) 1986-11-27 1986-11-27

Publications (1)

Publication Number Publication Date
JPS6387839U true JPS6387839U (en) 1988-06-08

Family

ID=31129408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18304186U Pending JPS6387839U (en) 1986-11-27 1986-11-27

Country Status (1)

Country Link
JP (1) JPS6387839U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176974A (en) * 1974-12-27 1976-07-03 Hitachi Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5176974A (en) * 1974-12-27 1976-07-03 Hitachi Ltd

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