JPS6387832A - Cross connection system for digital transmission - Google Patents

Abstract

PURPOSE:To contrive to save line concentration space by demultiplexing once a digital signal of a high order group of an asynchronizing system inputted to each input line into a low order group and applying staff multiplication so as to attain the replacement of time slot. CONSTITUTION:A staff synchronizing means 1 receiving plural input digital signals of asynchronizing system and sending plural 1st synchronizing signals subjected to staff synchronization including each input digital signal, a mutual connection means 3 applying time division multiplex to the 1st synchronizing signals, sending the result to a time switch 32 to apply replacement of time slots and sending plural 2nd synchronizing signals, and a de-staff means 2 sending plural output digital signals eliminated with a bit added by the staff synchronizing means from each of the 2nd synchronizing signals, are provided. Thus, the connection replacing applying the time switch 32 is attained to the digital signals of the asynchronizing system to reduce the scale of the device and the line concentration space.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a cross-connect system for digital transmission, and particularly to a digital transmission system used for switching interconnection of transmission paths of time-division multiplexed digital signals within a station. related to the cross-connect method.

[Conventional technology]

With the expansion of the application area of digital communication in recent years, initial route settings for digital transmission lines, expansion of lines during operation,
The cross-connect method for changing routes in response to service changes or failure occurrences has the potential to reduce equipment scale, reduce line concentration space, save labor in connection work, and diversify switchable hierarchy levels. Multifaceted demands are increasing.

This type of conventional cross-connect system for digital transmission uses a distribution rack equipped with a group of switches that change the interconnection (cross-connect) of multiple signal lines (for example, coaxial cables), and the switches are manually operated. This is a method for switching connections. There are two types of digital signals on the transmission line: synchronous multiplexed and stuff multiplexed asynchronous. For asynchronous digital signals, there is a time switch that switches connections by switching time slots. Since there is no technology to apply this, space switches that interconnect signal lines are used as switch groups for distribution racks.

[Problem that the invention seeks to solve]

The above-mentioned conventional cross-connect system for digital transmission uses a space switch as a switching means for interconnecting transmission lines, so it is possible to downsize the device, save line concentration space,
The problem is that it is impossible to fully meet demands such as the diversification of switching units and the like.

That is, while a time switch can be easily miniaturized by circuit integration, there is a limit to the miniaturization of a space switch. Furthermore, in order to diversify the switching units, it is necessary to decompose a high-order group into its constituent low-order groups and switch connections in units of low-order groups.In the conventional method using space switches,
The high-order group digital signal is decomposed into low-order groups by a separator and then guided to the distribution rack.The distribution rack exchanges the interconnections between the low-order groups, and then the low-order groups are converted into higher-order groups by the multiplexer. There is no choice but to adopt a multiplexed configuration.

As a result, it is necessary to provide a multiplexing device and a demultiplexing device in addition to the distribution rack, and the number of signal lines increases in order to guide the decomposed low-order group digital signals. Space savings become impossible.

An object of the present invention is to solve the above-mentioned problems by making it possible to switch connections using a time switch for asynchronous digital signals, thereby reducing the equipment scale and line concentration space compared to conventional methods. The object of the present invention is to provide a cross-connect system for digital transmission that is easy to use.

[Means for solving problems]

The system of the present invention receives a plurality of asynchronous input digital signals having a common first bit rate and outputs each signal at a common second bit rate set higher than the first bit rate. stuff synchronization means for sending out a plurality of first synchronization signals that are stuff-synchronized and include the input digital signal; interconnection means for transmitting a plurality of second synchronization signals having the second bit rate by mutually interchanging slots and time-divisionally separating the plurality of second synchronization signals; and destuffing means for sending out a plurality of output digital signals from which bits added by the stuffing synchronization means have been removed.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention, and FIG. 2 is a timing diagram for explaining its operation.

In FIG. 1, n input lines (1) or input lines in
) (rl is a preset natural number) are signal lines for inputting asynchronous digital signals having the same nominal value of bit rate 'rfo. The input lines (1) to (n) are each led to a stuff synchronization circuit 1. Each stuff synchronization circuit 1 has a bit rate fs set higher than the nominal bit rate fo of the input signal.
After stuff synchronization is applied to the input signal, frames of a predetermined number of bits (m bits) are constructed in a predetermined format and sequentially transmitted. Each stuff synchronization circuit 1 performs stuff synchronization in synchronization with each other at the same bit rate fs,
Furthermore, the frame starting points are aligned all at once in accordance with the frame pulse indicating the starting point of each frame, and a digital signal subjected to stuff synchronization is sent out. As illustrated in FIG. 2, each output signal of the stuff synchronization circuit 1 has the first bit b,
One frame is composed of m bits of the m-th bit bm, and the content is obtained by adding frame bits, stuff bits, stuff specification bits, etc. to the input signal to each input line (1) to n). Motsu.

In this way, the n
The book digital signal is sent to the interconnect circuit 3. In the interconnection circuit 3 , a serial-to-parallel conversion circuit 30 performs serial-to-parallel conversion on the output signal of each stuff synchronization circuit 1 one frame at a time, and sends m parallel signals resulting from the conversion to a multiplexing circuit 31 . The multiplexing circuit 31 time-division multiplexes n sets of these parallel signals and sends m parallel signals resulting from the multiplexing to the time switch 32 . In the sending signal of the multiplexing circuit 31 illustrated in FIG.
However, 5 is common, and 0≦j≦m) corresponds to the j-th pitch 1-bj in the frame of the output signal of the stuff synchronization circuit 1 connected to the input line (i). The time switch 32 first receives a control signal that instructs a combination of time slot exchanges, and sets a common combination of n time slot exchanges of bits b(1) to btnl for m parallel signals. . After this, time switch 32
performs time slot swapping on the m parallel signals sent from the multiplexing circuit 31 using the preset swapping combination, and transfers the m parallel signals resulting from the swapping to the separation circuit 33.
send to After this, contrary to the stage before the time switch 32, the time-division multiplexed n sets are separated into each set by the separation circuit 33, and the parallel signals of each set are converted into serial signals by the parallel-to-serial conversion circuit 34. After conversion, n digital signals resulting from the conversion are sent to each destuff circuit 2.

After establishing frame synchronization, each destuffing circuit 2 restores the input signal to the input line (1) to input m (n) by adding or removing bits in the stuffing synchronization circuit 1, and restores the input signal to the input line (1) to input m (n). (1) to output line (n). For the output lines (11 to output line +n+), there is one incense stick of each input signal of the input line (1) to input line (n) that has been swapped in response to the time slot swapping at the time switch 32. appear one by one.

As described above, in this embodiment, by performing stuff synchronization on the asynchronous digital signals input to the input lines (1) to (n), respectively, it is possible to change the time slots in the time switch. , output line (1)
or output line in). Therefore, compared to the conventional case, it is possible to reduce the size of the switch and the space for concentrating lines, and furthermore, it is possible to quickly switch interconnection routes simply by applying a control signal. In the interconnection circuit 3 in this embodiment, the serial-to-parallel conversion circuit 30 and the parallel-to-serial conversion circuit 34 convert the bit rate of the digital signal after multiplexing in the multiplexing circuit 31 (i.e., fs m)
) is provided to adapt the operation rate of the time switch 32 to the operating rate of the time switch 32.
If operation is possible with n), it may be removed.

3 and 4 are a block diagram and a timing diagram, respectively, showing a second embodiment of the present invention. In this embodiment, an asynchronous high-order group of digital signals is input to the input line (1) to input line (n), respectively, and the separation circuit 4 separates the digital signals into one low-order group that constitutes the input high-order group. , stuff is multiplexed in the stuff multiplexing circuit 5 and sent to the interconnection circuit 3. As illustrated in FIG. 4, the output signal of each stuff multiplexing circuit 5 is configured by bit-multiplexing one low-order group of m bits each, and the j-th unit is The j-th bit example (i.e., bjl) of the first to first low-order groups.

bj2. ...bji).

As in the case of the first embodiment, the interconnection circuit 3 receives n digital signals formed into frames with a length of <(mXl) bits described above and whose starting points are aligned, and ( After serial-parallel conversion (if necessary), the n digital signals are time-division multiplexed, and then time slots are exchanged using a time switch. The time-division multiplexed signal after time slot swapping is again separated into n digital signals each having a frame structure of (mXl) bit length, and then sent to a destuff separation circuit (after performing parallel-to-serial conversion if necessary). Sent to 6. After establishing frame synchronization, the destuff separation circuits 6 remove the bits added in the stuff multiplexing circuit 5, and
The signals are separated into low-order groups and sent to the multiplexing circuit 7. Each multiplexing circuit 7 time-division multiplexes one low-order group to restore a high-order group digital signal, and outputs the output line (1) to the output line (n
).

Output line (1) to output line (n) are connected to interconnection circuit 3.
In response to time slot exchange within
The contents of one low-order group constituting each input high-order group of the input line (n) are exchanged and appear one by one.

As described above, in this embodiment, the asynchronous high-order group digital signals inputted to the input lines (1) to (n), respectively, are separated into lower-order groups, and then stuff multiplexed is applied to the time switch. It is possible to exchange the time slots in the output line (1) or the output line (nl
It is possible to perform interconnection in units of low-order groups. Therefore, compared to the conventional case, it is possible to reduce the size of the switch and the space for concentrating lines, and furthermore, it is possible to quickly change the route of interconnection using a control signal.

〔Effect of the invention〕

As explained above, the present invention enables connection switching using a time switch for asynchronous digital signals, and realizes a cross-connect system for digital transmission that requires smaller equipment scale and line concentration space than conventional methods. There is an effect that it can be done.

[Brief explanation of the drawing]

1 and 3 are block diagrams showing an embodiment of the present invention, and FIGS. 2 and 4 are timing diagrams for explaining the operation of the embodiment of the present invention. 1... Stuff synchronization circuit, 2... Destuff circuit, 3... Interconnection circuit, 30...
...Series-to-parallel conversion circuit, 31...Multiple circuit, 32...Time switch, 33...Separation circuit, 34...Parallel-series Conversion circuit, 4...
...separation circuit, 5...stuff multiplexing circuit,
Sl1. ``Representative Patent Attorney Uchihara Me (〕), l foil 1 figure foil 2 shihaku 3 figure

Claims (3)

[Claims] (1) receiving a plurality of asynchronous input digital signals having a common nominal first bit rate; and receiving each said input digital signal at a common second bit rate set higher than said first bit rate; stuff synchronization means for sending out a plurality of stuff-synchronized first synchronization signals including a plurality of first synchronization signals; interconnection means for transmitting a plurality of second synchronization signals having the second bit rate in a time-divisionally separated manner;
and destuffing means for sending out a plurality of output digital signals obtained by removing bits added by the stuffing synchronization means from each of the plurality of second synchronization signals. Connect method. (2) The stuffing synchronization means has a plurality of stuffing synchronization circuits that directly perform the stuffing synchronization on each of the input digital signals, and the destuffing means performs the stuffing synchronization from each of the second synchronization signals. A cross-connect system for digital transmission according to claim 1, further comprising a plurality of destuffing circuits for removing bits added by a synchronization circuit and transmitting the resulting output digital signals as respective output digital signals. (3) The stuffing synchronization means includes a plurality of separation circuits that once separate each of the input digital signals of a high-order group into digital signals of a low-order group of antinodes, and a plurality of stuff multiplexers that stuff-multiplex the separated digital signals. the time switch performs mutual interchange of time slots in units of the lower order group, and the destuffing means removes the additional bit from each of the second synchronization signals and Claims comprising: a plurality of destuff separation circuits that once separate the signals into a plurality of low-order groups; and a plurality of multiplexing circuits that time-division multiplex the separated signals and send them out as the output digital signals. (1) Cross-connect method for digital transmission.