JPS6318900A - Burst multiplex terminal equipment - Google Patents

Abstract

PURPOSE:To facilitate the setting of paths in a switch network and the enlargement of the scale of the switch network and consequently to facilitate the setting of the multiple line with optional speed by inserting tag information into burst signals and setting signal paths inside the switch network by means of the tag information. CONSTITUTION:A multiplex conversion part 2 is subjected into the 2 multiplexing or separation of the burst signals from transmission lines on the input side 1 with various speed, and converts the multiplexing channel numbers to the channel numbers of highways 3. Header conversion parts 4 add tag information to the header parts of the burst signals. Further, said parts 4 speed-convert the burst signals and transmit the burst signals to switch network links 5 at the speed more rapid than the transmission speed of the highways 3. A line setting part 6 consists of the switch network in which respective burst signals are transmitted to objective signal paths by tag information. Header conversion parts 8 remove tag information from respective burst signals, reduce the transmission speed of highways 9 and transmit the signals. A multiplex conversion part 10 separates the burst signals to the transmission lines in the output side 11. The total transmission capacity of the transmission lines on the output side 11 is equal to that of the transmission lines on the input side 1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention is applied to a digital exchange. In particular, the present invention relates to a burst multiplex terminal station apparatus that repacks multiplexed burst signals input from a plurality of transmission paths for each destination and sends them to an output transmission path to effectively utilize the transmission paths.

[Conventional technology]

In conventional digital switching equipment, a synchronous multiplex converter is used in order to effectively use the capacity of a transmission line by dividing it into a plurality of lines.

FIG. 9 shows a block diagram of such a conventional equivalent multiplex conversion device, and FIG. 10 shows the structure of a signal on a transmission path, that is, a synchronous multiplex frame.

The input-side multiplex converter 91 synchronously multiplexes or demultiplexes the synchronously multiplexed signals of the input-side transmission line l, and converts the number of multiplexed channels into the number of channels of the highway 92. This signal is output to highway 92.

The line setting section 93 includes a time switch 94 and a space switch 95 that operate in synchronization with the synchronously multiplexed frame signal.
The network includes a switch network configured by the network, exchanges signals on and between highways 92, and establishes lines between each highway 92.

Time switch 94 transposes the time position of the signal within single highway 92. Space switch 95 is highway 9
Swap the signals between the two.

The multiplex converter 96 on the output side synchronously multiplexes or separates the signals from the line setting unit 93, and converts the number of multiplexed channels into the number of channels on the output side transmission line 1).

[Problem that the invention seeks to solve]

However, in the conventional synchronous multiplex converter, the number of signal bits that can be exchanged by the time switch and the space switch used in the line setting section is a constant number determined by the hardware of the switch network. Therefore, the signals within one synchronously multiplexed frame can only be replaced by integral multiples of the above-mentioned constant number. Therefore, the line capacity that can be set in this conventional device is limited to an integral multiple of the line capacity determined by [number of bits that can be replaced in the switch network]/[frame period]. Furthermore, due to the nature of synchronous multiplexing, the transmission speed of each line is limited to a speed synchronized with the transmission line clock.

One object of the present invention is to solve the above problems and provide a burst multiplex terminal device that has a simple circuit configuration and is easy to control, and can flexibly respond to changes in line speed and line capacity. shall be.

[Means for solving the invention]

The burst multiplex terminal device of the present invention includes means for receiving burst signals multiplexed from a plurality of input side transmission lines, a line setting means for distributing the burst signals received by this means to a destination side, and this line setting means. In the burst multiplexing terminal device, the receiving means includes means for adding tag information to each burst signal in accordance with the destination of the burst signal. , the line setting means includes a switch circuit network that switches the signal transmission path according to the tag information,
The transmitting means is characterized in that it includes means for removing tag information from each burst signal.

[For production]

In the burst multiplex terminal device of the present invention, tag information such as a destination number is added to the header part of the multiplexed burst signal, and each unit switch in the switch network reads the tag information and performs switching, and finally transmits a burst signal to a specific output terminal.

The structure of the switch, the method of controlling the switch, the method of multiplexing within the switch network, and the method of controlling line settings associated therewith differ from the conventional synchronous multiplex converter.

〔Example〕

FIG. 1 shows a block configuration diagram of a burst multiplex terminal apparatus according to an embodiment of the present invention, and FIGS. 2 and 3 show frame configurations of burst signals on a transmission path and in a line setting section, respectively.

A plurality of input side transmission lines 1 are connected to a multiplex conversion section 2. The multiplex converter 2 is connected to a header converter 4 via a highway 3. The header converter 4 is connected to a line setting section 6 via a switch network link 5. The line setting section 6 is connected to the header conversion section 8 via a switch network link 7. Header converter 8 is connected to multiplex converter 10 via highway 9.

The multiplex converter 10 is connected to the output transmission line 1).

The multiplex converter 2 accommodates input transmission lines l of various speeds, multiplexes or separates burst signals having the frame structure shown in FIG. 2, and increases the number of multiplexed channels to highway 3.
Convert to number of channels.

The header converter 4 adds tag information to the header portion of each burst signal. In this embodiment, it is assumed that the burst signal on the transmission path includes a header section, an information section, and a frame check sequence, and the header section includes a flag and a channel identification address. Tag information shall be inserted.

The header converter 4 changes this data content when it is necessary to change the channel identification address in the header section for each transmission path. Furthermore, in order to reduce the waiting delay within the line setting section 6 caused by the increase in burst length due to the addition of tag information, the header conversion section 4 converts the speed of the burst signal and transfers it to the switch network at a speed higher than the transmission speed of the highway 3. Send a burst signal to link 5.

The line setting unit 6 is constituted by a switch network that transmits each burst signal to a target signal path based on tag information. Hereinafter, such a switch network will be referred to as a "self-routing switch network." The header converter 8 removes the tag information from each burst signal, lowers the transmission speed to the transmission speed of the highway 9, and transmits the signal.

The multiplex converter 10 separates the burst signal onto the output transmission line 1).

The transmission capacity and transmission speed of each output transmission line 1) are as follows:
Similarly to the input side transmission line l, it does not need to be constant. The total transmission capacity of the output transmission line 1) is equal to the total transmission capacity of the input transmission line 1.

In this manner, the device of this embodiment can set a line of any speed by making the burst signal generation cycle asynchronous with the clock of the transmission line or by arbitrarily changing the burst length. By performing burst multiplex conversion, transmission paths and line bundles of arbitrary speeds can be accommodated. Therefore, in the conventional example, a predetermined speed was used as a line setting unit, and only lines with transmission speeds that were integral multiples of the predetermined speed could be set, but in this embodiment, lines can be set at a wide variety of speeds, and orderless group multiplexing is also possible. It is possible.

FIG. 4 is a block diagram showing an example of the multiplex conversion section 2 on the input side.

The input side transmission line 1 is connected to the highway 3 via a buffer 21. The waiting controller 22 reads out the burst signal stored in the buffer 21 in the waiting state at the transmission speed of the highway 3 and outputs it to the highway 3.

FIG. 5 is a block diagram showing an example of the header converter 4 on the input side.

Buffer 41 and header detection section 42 are connected to highway 3. Header detection section 42 is connected to buffer 41 and header conversion table 43. Buffer 41 and header conversion table 43 are connected to switch network link 5 via selector 44 .

The header detection unit 42 extracts the channel identification address in the burst signal, and reads tag information necessary within the self-routing switch network from the header conversion table 43.

At this time, the channel identification address is rewritten if necessary. Detection of the header section is performed by detecting a flag using a pattern matching method, and then capturing a channel identification address of a predetermined number of bits. The buffer 41 is
The transmission speed of the burst signal is converted from the transmission speed of the highway 3 to the transmission speed of the switch network link 5. The selector 44 outputs the output of the buffer 41 and the header conversion table 43.
By switching the output and outputting it to the switch network link 5, the header section and the channel identification address are rewritten.

FIG. 6 shows an example of a self-routing switch network within the line setting section 6.

This self-routing switch network is constructed by connecting two unit switches 61 with two outputs powered by each other. The unit switch 61 outputs the burst signal to a predetermined output line based on tag information included in the input burst signal. Here, a plurality of pieces of data may pass through one unit switch 61 depending on the path within the switch network. At this time, in order to prevent burst signal collision, one burst (number) can be temporarily stored in the unit switch 61 at the previous stage. This self-routing switch network has a building block configuration in which unit switches 61 are combined. Therefore, there is an advantage that there is no limit to the expansion of the switch scale.

To associate the tag information with the signal path, for example, the header converter 4 adds tag information with the same number of bits as the number of switch stages to the burst signal, and the first stage unit switch 61 adds the tag information with the same number of bits as the number of switch stages. When the first bit from the higher order is "0", the burst signal is outputted to the upper output line, and when this bit is "1", it is outputted to the lower output line.

In this case, by making the lower bits of the tag information match the number of the switch network link 7, it is possible to output the burst signal to the target switch network link 7. In the example shown in FIG. 6, there are eight switch network links 7, so
The lower 3 bits can specify the switch network link 7, and the 3rd and subsequent stages of the signal path are determined by the lower 3 bits.

Regarding the method for determining the remaining part of the tag information, that is, the upper bits, for example, the upper bits are added in correspondence with the channel identification address. Thereby, the signal path from switch network link 5 to switch network link 5 can be fixed to a single signal path for a certain channel, and the signal flow can be distributed to each signal line. Furthermore, it is possible to prevent signal sequence swapping caused by waiting delays. That is, when another signal is using the signal path to be passed, the signal is waited for at the unit switch 61 in the middle, so the time order changes among the plurality of input signals and the sequence of burst signals is swapped. However, if the signal path is determined for each channel, it is possible to prevent the sequence of burst signals from changing within the channel.

FIG. 7 shows a block diagram showing an example of the header converter 8 on the output side.

Switch network link 7 is connected to buffer 81 and header detector 82 . The header detection section 82 has a buffer '781
connected to. Buffer 81 is connected to highway 9. The header detection unit 82 detects the header part in the burst signal, prohibits writing of tag information to the buffer 81, and removes the tag information. The buffer 81 stores burst signals containing tag information at the transmission speed of the switch network link 7 and outputs burst signals containing no tag information at the transmission speed of the highway 9.

FIG. 8 is a block diagram showing an example of the multiplex conversion section 10 on the output side.

Highway 9 includes header detection section 101 and selector 10
Connected to 2. The header detection unit 101 is the selector 10
Connected to 2. The selector 102 has multiple buffers 10
Connected to 3. Each buffer 103 is an output transmission line 1)
connected to.

The header detection unit 101 switches the selector 102 based on the channel identification address in the burst signal,
A burst signal is sent to each output side transmission line 1).

〔Effect of the invention〕

As explained above, the burst multiplex terminal device of the present invention inserts tag information into a burst signal, and extracts the tag information from the burst signal. [This sets the signal path within the switch network. Therefore, it is easy to set the route of the switch network. In addition, since the switch network can be configured as a building block,
It is easy to expand the scale of the switch network. Therefore, multiple lines of arbitrary speeds can be easily set up, and efficient transmission becomes possible.

INDUSTRIAL APPLICABILITY The present invention is excellent as a line setting terminal station in a multimedia communication network where various line speeds are required. Furthermore, when used in a terminal station having a protection line switching function that increases the reliability of the leased line, it has the effect of facilitating line setting control.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a burst multiplex terminal apparatus according to an embodiment of the present invention. FIG. 2 is a diagram showing the frame structure of a burst signal on a transmission path. FIG. 3 is a diagram showing a frame structure of a burst signal in the line setting section. FIG. 4 is a block diagram of the input side multiplex conversion section. FIG. 5 is a block diagram of the input side header converter. FIG. 6 is a diagram showing a self-routing switch network. FIG. 7 is a block diagram of the output side header converter. FIG. 8 is a block diagram of the output side multiplex conversion section. FIG. 9 is a block diagram of a conventional synchronous multiplex conversion device. FIG. 10 is a diagram showing the structure of a synchronous multiplex frame. 1... Input side transmission line, 2... Multiplex conversion unit, 3...
Highway, 4... Header converter, 5... Switch network link, 6... Line setting unit, 7... Switch network link, 8... Header converter, 9... Highway, 1
0...Multiple conversion unit, 1)...Output side transmission path, 21.
・・Buffer, 22 ・・Waiting controller, 4
1...Buffer, 42...Header detection unit, 43...
・Header conversion table, 44...Selector, 61...
- Unit switch, 81... Buffer, 82... Header detection section, 91... Multiplex conversion section, 92... Highway, 93... Line setting section, 94... Time switch,
95... Space switch, 96... Multiple conversion unit, 10
1... Header detection section, 102... Selector, 103
···buffer. Patent applicant: Nippon Telegraph and Telephone Corporation 1. -7~1, Daiki example Meretsu setting evil B0 frame solitary pi 3 illustration'! ″] 41)! f7') Multi-Kou Disaster Department JY, 4
Illustrated fJ side header] U section χ 5 Henoda JLJ with illustration 71 is also 8 yen Mikado Asahi Shintashi Sugata Ibaratei 38 illustration

Claims (1)

[Claims] (1) A means for receiving multiplexed burst signals from a plurality of input side transmission lines; A line setting means for distributing the burst signals received by this means according to destination; and an output side for multiplexing the output of this line setting means. In the burst multiplex terminal device, the receiving means includes means for adding tag information to each burst signal in accordance with the destination of the burst signal, and the line setting means includes means for adding tag information to the burst signal in accordance with the destination of each burst signal. 1. A burst multiplex terminal station apparatus comprising a switch circuit network for switching signal transmission paths according to information, and wherein said sending means includes means for removing tag information from each burst signal.