JPS6373324A - Memory control system for bar code reader - Google Patents

Abstract

PURPOSE:To accumulate bar code data large in capacity at low price, by performing the read/wire of the bar code data by controlling a random access memory, instead of a FIFO memory. CONSTITUTION:When the bar code data is inputted, a timing adjusting circuit 1 outputs a write command signal, a read command signal, and a synchronizing signal with a prescribed timing. A counter circuit 2 counts the write signal, and the read signal based on the synchronizing signal, and generates a write address, and a read address one by one. The random access memory 3 writes the bar code data on the position of the write address, and similarly performs the read of the data from the read address. Thus, the memory 3 can perform the role of the FIFO memory. Therefore, it is possible to accumulate the bar code data large in capacity at the low price.

Description

[Detailed Description of the Invention] [Summary] The present invention writes and reads barcode data by controlling a writable and readable memory instead of a FIFO memory in a barcode reading device, so that it is possible to obtain a large capacity at a low price. barcode data can be stored.

(Field of Industrial Application) The present invention relates to a memory control method for a barcode reader that controls a memory that stores barcode data input to the barcode reader.

(Prior Art) Conventionally, there has been a bar code reading device as shown in FIG. The barcode reading device shines light on a barcode 31 with a black and white pattern in the form of vertical stripes, inputs a waveform A corresponding to the barcode 31 obtained from the light reflected from the black and white pattern into a bar width counter 32, and Count the width (tl~tn) and save the result as barcode data in FIFO
It is input to memory (a functional memory that does not depend on addresses; the memory from which the first input data is first retrieved). FIF
The output of the O memory 33 is logically checked by the demodulation circuit 34, and only the necessary barcode data is transferred to the RAM 35 via DMA.
Transferred (transferred using direct memory access method). RAM
The barcode data transferred to MPU 35 is edited by MPU (microprocessor unit) 36 and sent to an external output device as demodulated label data.

Here, the barcode data is temporarily stored in the FIFO memory 33, and the data processing after the demodulation circuit 34 is performed by the MPU.
This is because the processing speed is limited to 36, and is necessary when barcode data is input at a rate exceeding that speed.

(Problems to be Solved by the Invention) Recently, when reading barcodes 31, devices that scan with a laser beam instead of ordinary light have come into use. This barcode reading device reads the barcode 31 at high speed, and requires a large amount of FIFO memory 33 because unnecessary pseudo data such as characters surrounding the barcode is input in addition to the necessary barcode data. However, because it is difficult to use a large amount of FIFO memory 33 due to the price, there is a problem in that the memory capacity must be limited.

Therefore, the present invention has been made in order to solve this problem, and has been made for the purpose of providing a memory control method for a barcode reading device that is inexpensive and has sufficient memory capacity. .

Technical Means for Solving Problem C] In order to solve this problem, the present invention provides a system for controlling a memory that stores barcode data input to a barcode reading device, as shown in FIG. , a timing adjustment circuit l that outputs at a predetermined timing a write command signal for commanding writing of barcode data, a read command signal for commanding reading of barcode data, and a synchronization signal synchronized with these signals; It is equipped with a counting circuit 2 that counts based on a signal and generates a write address and a read address, and a write/readable memory 3 that writes and reads barcode data based on the command signal and the address. It is something.

(Operation) When barcode data is input to the barcode reading device, the timing control circuit 1 outputs a write command signal, read command signal, etc. at a predetermined timing. that time,
The counting circuit 2 counts based on a synchronization signal synchronized with the write command signal or read command signal, and sequentially generates the write address or read address.

Then, the write/readable memory 3 writes the data at the specified write address in synchronization with the write command signal, and similarly reads the data from the specified read address in synchronization with the read command signal. Let's do it.

Thus, the memory control method of the barcode reading device according to the invention allows the readable/writeable memory 3 to serve as a substitute for a FIFO memory.

〔Example〕

An embodiment according to the present invention is shown in FIG.

The timing adjustment circuit 11 uses a shift impulse signal, a shift out pulse signal, and a clock signal (for example, 50 ns
) Write enable signal WE (write command when in 1 state, read command when in 0 state) is used as a write and read command signal to command the writing and reading of barcode data at a predetermined timing based on the output. Outputs enable signal 0E (read command when in 1 state, write command when in 0 state) and chip select signal C8 for selecting memory chips, and outputs various synchronization signals synchronized with these signals. It is something. Synchronous signals synchronized with the write command signal and the read command signal include a bus gate signal BG for opening and closing the bus gate of the 3-state buffer memory 15, and a write signal for selecting a write address or a read address by the multiplexer 18. Mode signal WMODE
(Write mode in O state, read mode in L state) and up count (addition) to up/down counter 19
Alternatively, there is an up signal or a down signal for down-counting (subtraction).

RAM (readable memory) 13 receives chip select signal C8 and output enable signal OE.
The chip selected by the chip is activated, and bar code data is written and read based on a write command signal and a write address, and a read command signal and a read address, respectively.

The counting circuit 12 generates a write address and a read address by counting based on a synchronization signal synchronized with the write command signal and the read command signal, and the write address counter 16 . Read address counter 17.
It is composed of a multiplexer 1B, an up/down counter 19, a state determination circuit 20, and the like.

Write address counter 16 is timing adjustment circuit 1
Each time a synchronization signal synchronized with the write command signal from 1 is received, it is counted and a write address is sequentially generated based on the counting result. Each time a signal synchronized with the read command signal is received, it is counted, and read addresses are sequentially generated based on the counting results.

The multiplexer 18 selects between a write address and a read address, and when it receives the write mode signal WMODE (0 state) synchronized with the write command signal from the timing adjustment circuit 11, it selects the write address. However, upon receiving the write mode signal WMODE (1 state), the read address is selected.

The up/down counter 19 counts up (adds) when it receives an up signal synchronized with the write command signal.
Conversely, it is a counter that counts down (subtracts) when it receives a down signal synchronized with the read command signal.

The state determination circuit 20 reads the barcode in the RAM 13 based on the count data obtained by the up/down counter 19.
When the data storage state is determined and it is determined that there is a data storage location in the RAM 13, the write permission signal EXIS is sent.
T is transferred to the timing adjustment circuit 11 to allow the output of the write command signal, but when it is determined that the barcode data storage location in the RAM 13 is full, the write prohibition signal FULL is sent.
The signal is transferred to the timing adjustment circuit 11 to inhibit the output of the write command signal, and is comprised of a CARRY circuit, an OR circuit, and the like.

The input register 14 sequentially stores data read from the barcode 31 using a shift impulse signal.

The 3-state buffer memory 15 is used to temporarily store barcode data and adjust processing speed differences, and the state buffer memory 15 is used to temporarily store barcode data and adjust processing speed differences. When the gate is opened and closed and the gate is in the 70-ting state, the impedance becomes high.

The output register 21 transfers the barcode data read from the RAM 13 to the demodulation circuit 34 in response to the read signal RTIM from the timing adjustment circuit 11.

The barcode reader memory control method according to this embodiment operates as follows.

The barcode data read from the barcode 31 is sequentially stored in the input register 14 by the shift impulse signal, and then transferred to the 3-state buffer memory 15 and stored therein.

The barcode data output from the 3-state buffer memory 15 in response to the hash gate signal BG from the timing adjustment circuit 11 is transferred to the memory chip of the RAM 13 selected by the chip select signal C3 from the timing adjustment circuit 11. 3, upon receiving a write command signal from the circuit 11, the data is written to the position designated by the write address.

At this time, the timing adjustment circuit 11 sends an up signal synchronized with the write command signal to the up/down counter 19. When the up/down counter 19 receives the up signal, it counts and successively adds up the number of signals.

On the other hand, when the RAM 13 receives a read command signal from the timing adjustment circuit 11, it reads out the barcode data written in the position specified by the read address. At this time, the timing adjustment circuit 11 sends a down signal synchronized with the read command signal to the up/down counter 19.

When the up/down counter 19 receives the down signal,
The number of signals is counted and successively subtracted.

In this way, the counting result obtained by the up/down counter 19 is transferred to the state determining circuit 2o, and the storage state in the RAM 1a is determined. If it is determined that there is a data storage location in the RAM 13, the state determination circuit 20 transfers the write permission signal EXIST to the timing adjustment circuit 11 to permit output of the write command signal.
If it is determined that 3 is full, write inhibit signal F
ULL is transferred to the timing adjustment circuit 11 to inhibit output of the write command signal.

Here, the write address or read address is generated as follows. When a signal synchronized with the write command signal or read command signal from the timing adjustment circuit 11 is input to the write address counter 16 or the read address counter 17, the number of signals is counted and the write address or read address is determined based on the counting result. addresses are generated one after another. The write address or read address generated in this way is selected by the multiplexer 18 depending on whether or not it receives the write mode signal WMODE (O state) synchronized with the write command signal, and is stored in the RAM 18 in synchronization with the write command signal or read command signal. Specify the address.

1 The barcode data read from the RAM 13 is temporarily stored in the output register 21, and sequentially transferred to the demodulation circuit 34 according to the signal from the timing adjustment circuit 11 for processing.

〔Effect of the invention〕

Thus, in the memory control method of the barcode reading device according to the present invention, the FIFO is
The function of memory is realized in an equivalent manner.

Therefore, a large amount of barcode data can be stored at a low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional example. t, li-...Timing adjustment circuit 2.12...Counting circuit

Claims (1)

[Claims] In a method for controlling a memory that stores barcode data input to a barcode reading device, a write command signal instructs writing of barcode data, and a read command signal instructs readout of barcode data. A timing adjustment circuit (1) that outputs a command signal and a synchronization signal synchronized with these signals at a predetermined timing, and a counting circuit (1) that sequentially generates a write address and a read address by counting based on the synchronization signal. 2) and a barcode based on the command signal and the address.
A memory control system for a barcode reader, comprising a readable/writeable memory (3) for writing and reading data.