JPS6372131A - Manufactupe of semiconductor device - Google Patents
Manufactupe of semiconductor deviceInfo
- Publication number
- JPS6372131A JPS6372131A JP21598986A JP21598986A JPS6372131A JP S6372131 A JPS6372131 A JP S6372131A JP 21598986 A JP21598986 A JP 21598986A JP 21598986 A JP21598986 A JP 21598986A JP S6372131 A JPS6372131 A JP S6372131A
- Authority
- JP
- Japan
- Prior art keywords
- film
- plasma
- silicon nitride
- wiring
- protective film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 17
- 230000001681 protective effect Effects 0.000 claims abstract description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 6
- 239000005360 phosphosilicate glass Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052710 silicon Inorganic materials 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 4
- 229910021529 ammonia Inorganic materials 0.000 abstract description 4
- 239000007789 gas Substances 0.000 abstract description 4
- 238000010438 heat treatment Methods 0.000 abstract description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 2
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 abstract description 2
- 229910000077 silane Inorganic materials 0.000 abstract description 2
- 238000001704 evaporation Methods 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 44
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Local Oxidation Of Silicon (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
半導体基板上に形成された配線層の保護膜として光CV
D窒化珪素膜とプラズマ窒化珪素膜を交互に堆積させ半
導体基板に対するストレスを緩和させる。[Detailed description of the invention] [Summary] Optical CV as a protective film for a wiring layer formed on a semiconductor substrate.
A D silicon nitride film and a plasma silicon nitride film are alternately deposited to relieve stress on the semiconductor substrate.
本発明は半導体装置の製造方法に係り、特に半導体基板
上に形成された配線層の保護膜の形成法に関するもので
ある。The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming a protective film for a wiring layer formed on a semiconductor substrate.
バンシベーション技術は半導体装置例えばIC。 Vansivation technology is applied to semiconductor devices such as ICs.
LSI等に影響を与える各種の外部要因を取り除くため
行なわれる。そのバフシベーション技術の1つ人してセ
ラミックパッケージを用いた場合リン珪酸ガラス(PS
G)膜、プラスチックパッケージを用いた場合PSG膜
とプラズマ窒化シリコン(SisNa)膜の2N又は多
層膜が用いられている。特に後者のPSG膜とプラズマ
5iJa膜を用いる場合プラズマSi、N、膜はストレ
スが大きく下層の配線層が断線したり、またウェハの大
きさが大口径化するに従ってウェハを凸状の円弧状にそ
らせる問題を有する。This is done to remove various external factors that affect LSI etc. One of the buffsivation techniques is phosphosilicate glass (PS) when using a ceramic package.
G) When a film or plastic package is used, a 2N or multilayer film of a PSG film and a plasma silicon nitride (SisNa) film is used. In particular, when using the latter PSG film and plasma 5iJa film, the stress on the plasma Si, N, and film is so great that the lower wiring layer may break, and as the wafer size increases, the wafer may become shaped like a convex arc. Has a distracting problem.
本発明は半導体基板(ウェハ)に対してそりや、ウェハ
上の配線に断線等を生じない保護膜(カバー膜)を有す
る半導体装置の製造方法を提供することを目的とする。An object of the present invention is to provide a method for manufacturing a semiconductor device having a protective film (cover film) that does not cause warping of a semiconductor substrate (wafer) or disconnection of wiring on the wafer.
上記問題点は本発明によれば半導体基板上にストレス方
向の異なる光CVD窒化珪素膜とプラズマで解決される
。According to the present invention, the above problems are solved by using a photo-CVD silicon nitride film with different stress directions and plasma on a semiconductor substrate.
本発明によれば、前述した通りウェハを凸状の円弧状に
そらせる傾向を有するプラズマCVD (化学的気相成
長)窒化珪素(SiJn−)膜とプラズマCVD Si
+Na膜と反対にウェハを凹状の円弧状にそらせる傾向
を有する光CVD 5iJL膜とを交互に形成すること
によりストレスが相殺された保護膜が形成される。特に
この傾向は光CVDの光として低圧水銀灯を用いた場合
により現われる。According to the present invention, as described above, a plasma CVD (chemical vapor deposition) silicon nitride (SiJn-) film having a tendency to deflect the wafer into a convex arc shape and a plasma CVD Si
By alternately forming the +Na film and the photo-CVD 5iJL film, which tends to deflect the wafer in a concave arc shape, a stress-offset protective film is formed. In particular, this tendency appears when a low-pressure mercury lamp is used as the light for photoCVD.
光CVD法はプラズマCVD法と異なりプラズマによる
照射損傷がないため光CVD 5iJ4膜を直接ウェハ
上に形成することも可能である。Unlike the plasma CVD method, the photo-CVD method does not cause irradiation damage due to plasma, so it is also possible to form the photo-CVD 5iJ4 film directly on the wafer.
本発明によればストレスが相殺するようなプラグ7 S
i 3 N a膜と光CVD 5tJL膜の上下2層
が少なくとも1対形成される。PSG膜が最下層に存在
する時は光CVD 5isNa膜及びブラダ?CVD
Si:+N4膜対はいずれが上でもよい。According to the present invention, a plug 7S whose stress cancels out
At least one pair of upper and lower two layers of an i 3 Na film and a photo-CVD 5tJL film are formed. When the PSG film is on the bottom layer, is it a photo-CVD 5isNa film and a bladder? CVD
Either of the Si:+N4 film pairs may be on top.
(実施例) 以下本発明の実施例を図面に基づいて説明する。(Example) Embodiments of the present invention will be described below based on the drawings.
第1図は本発明の一実施例を示す断面図である。FIG. 1 is a sectional view showing one embodiment of the present invention.
第1図に示すようにシリコンウェハ1上に1μmの厚さ
のAl配線2を周知の蒸着法及びバターニングにより形
成し更に全表面を被覆するように約2000人の厚さに
光CVD 5iJ4膜3及びその上に約1000人のプ
ラズマ5fJ4膜4を形成して保護膜5を形成する。光
CVD 5iJn膜はガスとしてジシラン10cc/分
、アンモニア500cc/分、窒素500cc/分、圧
力3 Torrの条件でウェハ背面から赤外線ランプ、
抵抗加熱で300℃に加熱し赤外線を用いて形成した。As shown in FIG. 1, an Al wiring 2 with a thickness of 1 μm is formed on a silicon wafer 1 by well-known vapor deposition and buttering, and then a photo-CVD 5iJ4 film is applied to a thickness of about 2000 to cover the entire surface. 3 and a protective film 5 is formed thereon by forming a plasma 5fJ4 film 4 of about 1000 people. The photo-CVD 5iJn film was prepared using an infrared lamp from the back of the wafer under the conditions of gases such as disilane 10 cc/min, ammonia 500 cc/min, nitrogen 500 cc/min, and a pressure of 3 Torr.
It was formed by heating to 300° C. by resistance heating and using infrared rays.
一方プラズマ5isNa膜はガスとしてシラン600c
c/分、アンモニア517分、圧力1.25Torrの
条件で高周波50Ktlzで基板を380℃に加熱して
形成した。On the other hand, the plasma 5isNa film uses silane 600c as a gas.
The substrate was formed by heating the substrate to 380° C. with a high frequency of 50 Ktlz under the conditions of c/min, ammonia 517 min, and pressure 1.25 Torr.
第1図に示した保護膜はシリコンウェハ1にそりを生ぜ
ずしかも配線の断線が軽減される。また耐湿性において
PSG膜より優れており、水素濃度も低いためホットエ
レクトロン対策になり得る。The protective film shown in FIG. 1 does not cause warpage on the silicon wafer 1, and also reduces the possibility of wire breakage. Furthermore, it has better moisture resistance than PSG film and has a lower hydrogen concentration, so it can be used as a countermeasure against hot electrons.
第2図は本発明の他の実施例を示す断面図である。FIG. 2 is a sectional view showing another embodiment of the present invention.
第2図に示すようにシリコンウェハ1上に第1図と同様
に1μmの厚さのAl配線2を形成し、その上に1μm
の厚さのリン珪酸ガラス(PSG)膜、その上に約10
00人の厚さのプラズマ5fJ4膜4及び約2000人
の厚さの光CVD 5iJa膜3更に同様にプラズマS
i、N、膜4及び約2000人の厚さの光CVD5iJ
a膜3を順次形成する。As shown in FIG. 2, an Al wiring 2 with a thickness of 1 μm is formed on a silicon wafer 1 in the same manner as in FIG.
a phosphosilicate glass (PSG) film with a thickness of about 10
Plasma 5fJ4 film 4 with a thickness of 0.00 people and optical CVD 5iJa film 3 with a thickness of about 2000 people and similarly plasma S
i, N, photo-CVD 5iJ with film 4 and thickness of about 2000
The a-films 3 are sequentially formed.
このように光CVD 5i3Nn膜とプラズマ5iJ4
膜対を複数段はストレスから生ずるそりの発生を防止す
る保護膜が形成される。光CVD StJ<膜の厚さ約
2000人及びプラズマ5iJ4膜約1000人の厚さ
はそれぞれのストレスから起因するウェハに対するそり
を相殺できる厚さである。In this way, photo-CVD 5i3Nn film and plasma 5iJ4
A plurality of layers of film pairs form a protective film that prevents warpage caused by stress. The thickness of the photo-CVD StJ film is about 2,000 mm and the thickness of the plasma 5iJ4 film is about 1,000 mm, which are thick enough to compensate for the warping of the wafer caused by the respective stresses.
以上説明したように本発明によれば保護膜のストレスに
よるそりの発生が防止でき配線の断線も軽減され半導体
装置製造の歩留の向上を図ることができる。As described above, according to the present invention, warping of the protective film due to stress can be prevented, disconnection of wiring can be reduced, and the yield of manufacturing semiconductor devices can be improved.
第1図は本発明の一実施例を示す断面図であり、第2図
は本発明の他の実施例を示す断面図である。
1・・・シリコンウェハ、 2・・・Aβ配線、3・
・・光CVD Si、N、、 4・・・ブラダ7
S i 2 N、膜、5・・・保護膜、
6・・・PSG膜。FIG. 1 is a sectional view showing one embodiment of the invention, and FIG. 2 is a sectional view showing another embodiment of the invention. 1... Silicon wafer, 2... Aβ wiring, 3...
...Optical CVD Si, N,, 4...Bladder 7
S i 2 N, film, 5... protective film,
6...PSG film.
Claims (1)
珪素膜とプラズマ窒化珪素膜とを交互に形成することに
よって保護膜を形成することを特徴とする半導体装置の
製造方法。 2、前記プラズマ窒化珪素膜と光CVD窒化珪素膜を上
下2層1対で形成することを特徴とする特許請求の範囲
第1項記載の半導体装置の製造方法。 3、前記プラズマ窒化珪素膜と光CVD窒化珪素膜の上
下2層対を複数形成することを特徴とする特許請求の範
囲第2項記載の半導体装置の製造方法。 4、前記保護膜の最下層に光CVD窒化珪素膜を形成す
ることを特徴とする特許請求の範囲第1項記載の半導体
装置の製造方法。 5、リン珪酸ガラス膜を最下層に形成することを特徴と
する特許請求の範囲第1項記載の半導体装置の製造方法
。Claims: 1. A method for manufacturing a semiconductor device, characterized in that a protective film is formed by alternately forming a photo-CVD silicon nitride film and a plasma silicon nitride film with different stress directions on a semiconductor substrate. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the plasma silicon nitride film and the photo-CVD silicon nitride film are formed as a pair of upper and lower layers. 3. The method of manufacturing a semiconductor device according to claim 2, wherein a plurality of upper and lower two-layer pairs of the plasma silicon nitride film and the photo-CVD silicon nitride film are formed. 4. The method of manufacturing a semiconductor device according to claim 1, wherein a photo-CVD silicon nitride film is formed as the lowest layer of the protective film. 5. A method of manufacturing a semiconductor device according to claim 1, characterized in that a phosphosilicate glass film is formed as the lowest layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21598986A JPS6372131A (en) | 1986-09-16 | 1986-09-16 | Manufactupe of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21598986A JPS6372131A (en) | 1986-09-16 | 1986-09-16 | Manufactupe of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6372131A true JPS6372131A (en) | 1988-04-01 |
Family
ID=16681564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21598986A Pending JPS6372131A (en) | 1986-09-16 | 1986-09-16 | Manufactupe of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6372131A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5620910A (en) * | 1994-06-23 | 1997-04-15 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing semiconductor device with a gate insulating film consisting of silicon oxynitride |
-
1986
- 1986-09-16 JP JP21598986A patent/JPS6372131A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5620910A (en) * | 1994-06-23 | 1997-04-15 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing semiconductor device with a gate insulating film consisting of silicon oxynitride |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4801560A (en) | Semiconductor processing utilizing carbon containing thick film spin-on glass | |
JPS6372131A (en) | Manufactupe of semiconductor device | |
JPS6384122A (en) | Semiconductor device | |
JPH0555199A (en) | Semiconductor device | |
JPS62242331A (en) | Semiconductor device | |
JPS61296726A (en) | Manufacture of semiconductor device | |
JPS62154643A (en) | Manufacture of semiconductor device | |
KR100237355B1 (en) | Method for manufacturing semiconductor device | |
JPH0456239A (en) | Semiconductor device | |
JPH0342834A (en) | Semiconductor device | |
JPH0258353A (en) | Semiconductor device | |
JPH06310597A (en) | Semiconductor device | |
JPS6150378B2 (en) | ||
JPS6181631A (en) | Semiconductor device | |
JPH02151052A (en) | Manufacture of semiconductor device | |
JPH0284729A (en) | Aluminum wiring | |
JPS61125152A (en) | Manufacture of semiconductor device | |
JPH03291935A (en) | Semiconductor device | |
JPH0547754A (en) | Method of forming passivation film | |
JPH02143572A (en) | Photoelectric conversion device | |
JPH11260916A (en) | Semiconductor device and manufacture of the same | |
JPS61265824A (en) | Manufacture of semiconductor device | |
JPH0383341A (en) | Manufacture of semiconductor device | |
JPH0812845B2 (en) | Method for manufacturing semiconductor device | |
JPH0260128A (en) | Semiconductor device |