JPS6371532U - - Google Patents
Info
- Publication number
- JPS6371532U JPS6371532U JP16694686U JP16694686U JPS6371532U JP S6371532 U JPS6371532 U JP S6371532U JP 16694686 U JP16694686 U JP 16694686U JP 16694686 U JP16694686 U JP 16694686U JP S6371532 U JPS6371532 U JP S6371532U
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- wire bonding
- circuit board
- protective film
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001681 protective effect Effects 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
Description
第1図は本考案の一実施例の概略斜視図、第2
図は従来の厚膜回路基板の概略斜視図、第3図は
温度に対する本考案および従来の厚膜回路基板に
おけるボンデイングワイヤ保護樹脂と基板との密
着強度の関係を示すグラフである。
1……絶縁基板、2……導体パターン、2a…
…半導体素子搭載ランド、2b……ワイヤボンデ
イング電極、2c……配線、3……抵抗、4……
配線保護膜、5……電極を囲むガラス保護膜。
Fig. 1 is a schematic perspective view of one embodiment of the present invention;
The figure is a schematic perspective view of a conventional thick film circuit board, and FIG. 3 is a graph showing the relationship between the adhesion strength between the bonding wire protection resin and the board in the present invention and the conventional thick film circuit board with respect to temperature. 1...Insulating substrate, 2...Conductor pattern, 2a...
...Semiconductor element mounting land, 2b... Wire bonding electrode, 2c... Wiring, 3... Resistor, 4...
Wiring protective film, 5...Glass protective film surrounding the electrode.
Claims (1)
成されている厚膜回路基板において、前記ワイヤ
ボンデイング用電極の周囲が絶縁保護膜で覆われ
ていることを特徴とする厚膜回路基板。 1. A thick film circuit board having an electrode for wire bonding formed on an insulating substrate, wherein the periphery of the electrode for wire bonding is covered with an insulating protective film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16694686U JPS6371532U (en) | 1986-10-29 | 1986-10-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16694686U JPS6371532U (en) | 1986-10-29 | 1986-10-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6371532U true JPS6371532U (en) | 1988-05-13 |
Family
ID=31098411
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16694686U Pending JPS6371532U (en) | 1986-10-29 | 1986-10-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6371532U (en) |
-
1986
- 1986-10-29 JP JP16694686U patent/JPS6371532U/ja active Pending