JPS6364077U - - Google Patents
Info
- Publication number
- JPS6364077U JPS6364077U JP8422186U JP8422186U JPS6364077U JP S6364077 U JPS6364077 U JP S6364077U JP 8422186 U JP8422186 U JP 8422186U JP 8422186 U JP8422186 U JP 8422186U JP S6364077 U JPS6364077 U JP S6364077U
- Authority
- JP
- Japan
- Prior art keywords
- hybrid
- base board
- chip
- printed circuit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Description
第１図は、本考案のハイブリツトＩＣの取付け
構造を示す断面図。第２図は、従来使われている
ハイブリツトＩＣの取付け構造を示す断面図。
なお図において、１……ハイブリツトＩＣ、２
……ＩＣチツプ、３……ベース基板、４……カバ
ーキヤツプ、５……端子、６……プリント基板。
FIG. 1 is a sectional view showing the mounting structure of the hybrid IC of the present invention. FIG. 2 is a sectional view showing the mounting structure of a conventionally used hybrid IC. In the figure, 1...hybrid IC, 2
...IC chip, 3...Base board, 4...Cover cap, 5...Terminal, 6...Printed circuit board.
Claims (1)
記ベース基板上のＩＣチツプを中空状態でカバー
する如くカバーキヤツプがシールされたハイブリ
ツトＩＣのプリント基板への取付構造において、
前記ハイブリツトＩＣのベース基板が上向きとな
る状態で前記プリント基板上に取り付けられるこ
とを特徴とするハイブリツトＩＣの取付け構造。 A structure for mounting a hybrid IC on a printed circuit board, which includes a base board on which an IC chip is mounted, and a cover cap sealed so as to cover the IC chip on the base board in a hollow state.
A mounting structure for a hybrid IC, characterized in that the hybrid IC is mounted on the printed circuit board with the base board facing upward.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8422186U JPS6364077U (en) | 1986-06-02 | 1986-06-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8422186U JPS6364077U (en) | 1986-06-02 | 1986-06-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6364077U true JPS6364077U (en) | 1988-04-27 |
Family
ID=30938522
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8422186U Pending JPS6364077U (en) | 1986-06-02 | 1986-06-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6364077U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59139659A (en) * | 1983-12-02 | 1984-08-10 | Hitachi Ltd | Method for formation of lead for electronic circuit device |
| JPS6084845A (en) * | 1983-10-14 | 1985-05-14 | Matsushita Electric Works Ltd | Sealed semiconductor device |
| JPS61280644A (en) * | 1985-05-14 | 1986-12-11 | Sanyo Electric Co Ltd | Semiconductor device |
-
1986
- 1986-06-02 JP JP8422186U patent/JPS6364077U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6084845A (en) * | 1983-10-14 | 1985-05-14 | Matsushita Electric Works Ltd | Sealed semiconductor device |
| JPS59139659A (en) * | 1983-12-02 | 1984-08-10 | Hitachi Ltd | Method for formation of lead for electronic circuit device |
| JPS61280644A (en) * | 1985-05-14 | 1986-12-11 | Sanyo Electric Co Ltd | Semiconductor device |