JPS6336072U - - Google Patents
Info
- Publication number
- JPS6336072U JPS6336072U JP12854786U JP12854786U JPS6336072U JP S6336072 U JPS6336072 U JP S6336072U JP 12854786 U JP12854786 U JP 12854786U JP 12854786 U JP12854786 U JP 12854786U JP S6336072 U JPS6336072 U JP S6336072U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- circuit board
- lead terminal
- peripheral circuit
- housed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図は本考案の一実施例を示す断面図、第２
図及び第３図はそれぞれ従来例を示す断面図であ
る。
１１は付加機能付半導体装置、１２は半導体装
置、１２ａはリード端子、１３は回路基板、１４
，１５は周辺回路部品、１６はケース、１７は樹
脂である。
Fig. 1 is a sectional view showing one embodiment of the present invention;
3 and 3 are sectional views each showing a conventional example. 11 is a semiconductor device with additional functions, 12 is a semiconductor device, 12a is a lead terminal, 13 is a circuit board, 14
, 15 is a peripheral circuit component, 16 is a case, and 17 is a resin.
Claims (1)
装置及び周辺回路部品とをケース内に収容して封
止してなる付加機能付半導体装置において、上記
半導体装置におけるリード端子を上下両方向に延
設し、半導体装置を上記リード端子における上向
リード端子にて上記回路基板の下面に装着すると
共に、この回路基板の上面に上記周辺回路部品を
装着したことを特徴とする付加機能付半導体装置
。 In a semiconductor device with additional functions in which a circuit board, a semiconductor device mounted on the circuit board, and peripheral circuit components are housed and sealed in a case, lead terminals in the semiconductor device are provided to extend in both vertical directions. A semiconductor device with an additional function, characterized in that the semiconductor device is mounted on the lower surface of the circuit board using the upward lead terminal of the lead terminal, and the peripheral circuit component is mounted on the upper surface of the circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12854786U JPS6336072U (en) | 1986-08-22 | 1986-08-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12854786U JPS6336072U (en) | 1986-08-22 | 1986-08-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6336072U true JPS6336072U (en) | 1988-03-08 |
Family
ID=31024319
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12854786U Pending JPS6336072U (en) | 1986-08-22 | 1986-08-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6336072U (en) |
-
1986
- 1986-08-22 JP JP12854786U patent/JPS6336072U/ja active Pending