JPH0328756U - - Google Patents

Info

Publication number
JPH0328756U
JPH0328756U JP1989088726U JP8872689U JPH0328756U JP H0328756 U JPH0328756 U JP H0328756U JP 1989088726 U JP1989088726 U JP 1989088726U JP 8872689 U JP8872689 U JP 8872689U JP H0328756 U JPH0328756 U JP H0328756U
Authority
JP
Japan
Prior art keywords
additional functional
functional component
lead frame
semiconductor device
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989088726U
Other languages
Japanese (ja)
Other versions
JPH0648876Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989088726U priority Critical patent/JPH0648876Y2/en
Publication of JPH0328756U publication Critical patent/JPH0328756U/ja
Application granted granted Critical
Publication of JPH0648876Y2 publication Critical patent/JPH0648876Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示す半導体装置に
おいて非付加機能部品と付加機能部品とを搭載し
た状態を示す横断平面図、第２図は同じくそ縦断
側面図、第３図は同じく非付加機能部品のみを搭
載した状態を示す横断平面図、第４図は同じくそ
の縦断側面図、第５図は従来の付加機能を持たな
い半導体装置の横断平面図、第６図は同じくその
縦断側面図、第７図は従来の付加機能を内蔵した
半導体装置の横断平面図、第８図は同じくその縦
断側面図である。 １０……リードフレーム、１１，１２……非付
加機能部品、１３……絶縁封止樹脂、１４，１５
……付加機能部品、１６……プリント配線板、１
７……スルーホール。 FIG. 1 is a cross-sectional plan view showing a semiconductor device according to an embodiment of the present invention in which non-additional functional components and additional functional components are mounted, FIG. 2 is a vertical sectional side view of the same, and FIG. A cross-sectional plan view showing a state in which only additional functional parts are mounted, FIG. 4 is a vertical side view of the device, FIG. 5 is a cross-sectional plan view of a conventional semiconductor device without additional functions, and FIG. 6 is a vertical side view of the same. 7 is a cross-sectional plan view of a conventional semiconductor device incorporating additional functions, and FIG. 8 is a vertical cross-sectional side view thereof. 10... Lead frame, 11, 12... Non-additional functional parts, 13... Insulating sealing resin, 14, 15
...Additional functional parts, 16...Printed wiring board, 1
7...Through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] リードフレーム上に非付加機能部品が搭載され
、絶縁封止樹脂により樹脂封止される半導体装置
において、前記リードフレームに、付加機能部品
が搭載されたプリント配線板が接続され、該プリ
ント配線板に、前記非付加機能部品と付加機能部
品とのリードフレームの共用化を図るためのスル
ーホールが形成されたことを特徴とする半導体装
置。 In a semiconductor device in which a non-additional functional component is mounted on a lead frame and resin-sealed with an insulating sealing resin, a printed wiring board on which an additional functional component is mounted is connected to the lead frame, and the printed wiring board is . A semiconductor device, characterized in that a through hole is formed to allow the non-additional functional component and the additional functional component to share a lead frame.
JP1989088726U 1989-07-27 1989-07-27 Semiconductor device Expired - Fee Related JPH0648876Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989088726U JPH0648876Y2 (en) 1989-07-27 1989-07-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989088726U JPH0648876Y2 (en) 1989-07-27 1989-07-27 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0328756U true JPH0328756U (en) 1991-03-22
JPH0648876Y2 JPH0648876Y2 (en) 1994-12-12

Family

ID=31638322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989088726U Expired - Fee Related JPH0648876Y2 (en) 1989-07-27 1989-07-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0648876Y2 (en)

Also Published As

Publication number Publication date
JPH0648876Y2 (en) 1994-12-12

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees