JPS6362269A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the mounting area of a semiconductor device from increasing thereby to reduce the number of components to be mounted by forming a P-N junction diode in a polycrystalline silicon, and connecting an emitter or collector region to a polycrystalline silicon diode by electrode wirings. CONSTITUTION:A collector region 2 of a first conductivity type semiconductor layer is formed on a first conductivity type (N-type) semiconductor substrate 1, a second conductivity type (P-type) base region 3 is diffused in the region 2, and a first conductivity type emitter region 4 is formed in the region 3. A first conductivity type polycrystalline silicon 6 formed through an insulating film 5 on the region 4 is formed in contact with the second conductivity type polycrystalline silicon 7, the region 4 and the silicon 7 of reverse conductivity type to the region 4 are connected by a leading electrode layer 8, an emitter electrode 9 is connected from the silicon 6, and a base electrode 10 is led from the region 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a structure in which an external active element is built into a semiconductor device, particularly a discrete bipolar transistor, thereby increasing the complexity of the transistor.

[Conventional technology]

In general, when using transistors in the matrix circuit of a digital chaining system (1) T8), in order to prevent transistor switching malfunctions,
As shown in a) and (b), a diode is connected in series to the collector or emitter of the transistor. This is to prevent the collector or emitter current from flowing in the opposite direction (prevention of reverse hFK), as shown in region B of the collector-emitter voltage-collector current characteristic diagram shown in Figure 2 (1c). was connected externally to the transistor on a printed circuit board.

[Problem that the invention seeks to solve]

As described above, when a diode is connected externally on a printed circuit board, the circuit configuration of the printed circuit board becomes complicated, and furthermore, when miniaturization of the device is taken into consideration, it becomes difficult to reduce the number of parts.

[Means for solving problems]

According to the present invention, a polycrystalline silicon film is formed on a semiconductor substrate forming a transistor element via an insulating film, a P-N junction diode is formed in this polycrystalline silicon, and an electrode wiring is formed. By connecting the emitter region or collector region and the polycrystalline silicon diode, a semiconductor device in which a diode is formed in series with the emitter or collector within the transistor chip is obtained.

In this way, whereas in the past the diode was attached externally to the transistor, according to the present invention, the diode is built into the transistor chip, so there is no increase in the mounting area, and points can be reduced.

〔Example〕

- Next, the present invention will be explained in more detail using the drawings.

FIG. 1 is a cross-sectional view of a bipolar transistor according to an embodiment of the present invention. First conductivity type (N type) semiconductor substrate 1
There is a collector region 2 which is a first conductivity type (N type) semiconductor layer on top, and a second conductivity type (P type) semiconductor layer is provided in the collector region 2.
A base region 3 is formed by diffusion, and an emitter region 4 of a first conductivity type (N type) is formed within this base region 3.

A first layer is formed on the emitter region 4 with an insulating film 5 interposed therebetween.
Polycrystalline silicon 6 of a conductivity type (N type) and polycrystalline silicon 7 of a second conductivity type (P type) are formed in contact with each other, and an emitter region 4 and a second conductivity type opposite to the emitter region 4 are formed. type (P type) polycrystalline silicon 7 and an extraction electrode layer 8
The emitter electrode 9 is taken out from the 14th t1m (N type) polycrystalline silicon 6, and the base electrode 10 is taken out from the base region 3.

FIGS. 3(a), 3(b) and 3(c) show detailed cross-sectional views of the manufacturing process of the emitter part and diode part of the transistor according to this embodiment. In FIG. 1a), a base region 3 and an emitter region 4 are formed in a collector region 2, which is an N-type silicon epitaxial layer, by normal impurity diffusion, and then a non-doped polycrystalline silicon film is formed via an insulating film 5. Then, boron ions are implanted into this polycrystalline silicon film to form a P-type polycrystalline silicon film 7, and then vapor phase growth 5 is performed.
Polycrystalline silicon 7 is partially covered with in2 film 13, and 5
i02[13'lt As a mask, phosphorus is diffused to form N-type polycrystalline silicon 6, and these P-type and N-type polycrystalline silicones 6 and 7 form a PN junction diode.

Next, as shown in the same figure (b), P of polycrystalline silicon 6 and 7 is
After etching away the other parts, leaving only the vicinity of the -N junction, the entire surface is covered with a vapor-phase grown "JOZ film 14," and then 5i0 is deposited on the P-type polycrystalline silicon 6 and the N-type polycrystalline silicon 7.
A contact portion is provided on two films 14. Finally, as shown in the same figure (C1), a KAl extraction electrode 8 and an emitter electrode 9 are formed.

Note that the film thickness of polycrystalline silicon 6.7 is 5.00 OA.

Boron ion implantation dose is 1.0X1 at 50KeV
By diffusing phosphorus impurities at a temperature of 900° C. for 10 minutes, a polycrystalline silicon PN diode with a breakdown voltage of 5 V or more was obtained.

FIG. 4(a) is a sectional view of another embodiment of the present invention, and its equivalent circuit diagram is shown in FIG. 1bl. The difference from the embodiment shown in FIG. 1 is that the base series resistor 15 is formed of polycrystalline silicon and is added. In the case of base voltage drive, it is necessary to add a resistor 15 in series with the base electrode of the transistor. This series resistor 15 is simultaneously constructed in the chip using polycrystalline silicon, which is formed on the collector region 2 at the same time as the diode is formed. Note that the high-height region 17 on the surface of the collector region 2 is of the same conductivity type as the collector region 2, and is for preventing leakage current due to surface inversion.

〔Effect of the invention〕

As explained above, in the present invention, the diode for preventing reverse hrz, which was conventionally connected to the outside of the transistor, is integrally formed within the transistor chip, so the diode characteristics are stabilized, and the number of assembly steps is reduced based on the circuit configuration used. Moreover, it is possible to reduce the number of parts and design man-hours. Furthermore, in the transistor of the present invention, polycrystalline silicon is placed as a diode on the emitter region, so adding this diode can prevent an increase in the chip area. Therefore, the resistive acid part of the polycrystalline silicon that makes up the diode can be kept as small as possible, preventing deterioration of transistor characteristics due to the addition of a diode, and providing a thermally stable diode. .

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a transistor according to an embodiment of the present invention;
Figures 2 (a) and (b) are equivalent circuit diagrams of transistors with diodes added, Figure 2 (C) is a characteristic diagram showing the relationship between the collector-emitter voltage and collector current of the transistor, and Figure 3. ) f ib), Ic) are cross-sectional views showing the manufacturing process of the main parts of a transistor according to one embodiment of the present invention, FIG. 4 ta) is a cross-sectional view of a transistor according to another embodiment of the present invention, and FIG. is an equivalent circuit diagram thereof. 1: semiconductor substrate, 2: collector region, 3: base region,
4: emitter region, 5; insulating film, 6; N-type polycrystalline silicon, 7; P-type polycrystalline silicon, 8; extraction electrode, 9;
Emitter electrode, 10; Base electrode, 11; Transistor, 12; Diode, 13; S i 02.14;
81σh 15: Base series resistance, 16: Extracting electrode, 17: High concentration region. Agent: Susumu Uchihara, patent attorney. f13 person d 6λji man 3 Q (b) target 3g (e 萬42 (moan)

Claims (1)

[Claims] Polycrystalline silicon is formed on the semiconductor substrate in which the emitter, base, and collector regions are formed via an insulating film, and a P-N junction diode is provided inside the polycrystalline silicon to connect it in series to the collector or emitter of the transistor. A semiconductor device characterized in that a diode is connected to the diodes.