JPH08153800A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE: To provide a semiconductor integrated circuit device which has a high current gain I<2> L and a bipolar transistor element having high breakdown voltage. CONSTITUTION: The semiconductor integrated circuit device comprises N-type conductivity type epitaxial layers 2, 3 formed on a P-type semiconductor substrate 1. The layer 3 has an I<2> L 20 having P<+> type diffused regions 22, 23, an N<+> type diffused region 24, N<+> type diffused regions 25, 26 formed in the region 23, and an N<++> type diffused region 27 provided on the surface layer of the region 24, and a bipolar transistor element 40 having a P<+> type diffused region 42, an N<+> type diffused region 43, and an N<+> type diffused region 44 formed in the region 42.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device having I ² L and a normal bipolar transistor element.

[0002]

^2. Description of the Related Art I ² L (Integrated Inj) is one of the integrated circuits in which a logic circuit is composed of bipolar transistors.
section logic). The I ² L is an integrated circuit using a bipolar transistor, but since it is not necessary to separate the transistor elements, it is possible to achieve high integration and low power consumption. In combination with a normal bipolar transistor, the I ² L is a semiconductor integrated circuit device. Is used for.

The structure of a conventional semiconductor integrated circuit device having I ² L and a bipolar transistor will be described with reference to FIG. FIG. 1A shows a sectional view of a semiconductor integrated circuit device. The semiconductor integrated circuit device includes a P-type semiconductor substrate 1 and an N-type epitaxial layer 2 provided on the semiconductor substrate 1.
It consists of and. The I ² L 20 is composed of an N ⁺ type buried layer 21 provided between the semiconductor substrate 1 and the epitaxial layer 2, P ⁺ type diffusion regions 22 and 23 and an N ⁺ type diffusion region formed in the epitaxial layer 2. 24, N ⁺ type diffusion regions 25 and 26 formed in the P ⁺ type diffusion region 23, and N ⁺
N ⁺⁺ type diffusion region 2 provided on the surface layer of the type diffusion region 24
7 and each diffusion region has electrodes 28, 2
9, 30, 31, 32 are provided.

Normal bipolar transistor device 40
Is an N ⁺ type buried layer 41 provided between the semiconductor substrate 1 and the epitaxial layer 2, a P ⁺ type diffusion region 42 and an N ⁺ type diffusion region 43 formed in the epitaxial layer 2,
^And an N ⁺ type diffusion region 44 formed in the ⁺ type diffusion region 42. Each diffusion region has electrodes 45, 46,
47 are provided.

The I ² L 20 and the bipolar transistor element 40 are electrically separated by a P ⁺ type diffusion region 50. The surface of the epitaxial layer 2 is covered with the oxide film 51 except for the electrode portion. In FIG.
² shows an equivalent circuit corresponding to the L20 and the bipolar transistor element 40. I ² L as shown in FIG.
Is composed of a lateral PNP transistor indicated by reference numeral Tr1 in FIG. 5A, a normal NPN transistor indicated by reference numeral Tr2, and an NPN transistor connected in reverse. As is clear from FIGS. 9A and 9B, since the base / collector of the lateral PNP transistor and the emitter / base of the reverse connection NPN transistor are shared, separation and wiring of each transistor are unnecessary. FIG. 3C shows a normal bipolar transistor, which includes an N ⁺ type diffusion region 4
4 is used as an emitter, the P ⁺ type diffusion region 42 is used as a base, and the epitaxial layer 2 is used as a collector.

[0006]

However, I ² L
The semiconductor integrated circuit device including the conventional bipolar transistor element and the conventional bipolar transistor element has the following problems. That is, since the reverse connection transistor of I ² L is used in the reverse operation of the normal transistor, the impurity concentration of the epitaxial layer 2 which becomes the emitter of the reverse connection transistor must be increased in order to prevent the decrease of the current gain. There wasn't.
However, when the impurity concentration of the epitaxial layer 2 is increased, the withstand voltage of a normal bipolar transistor element coexisting is lowered, and a high withstand voltage semiconductor integrated circuit device cannot be obtained.

On the other hand, when the impurity concentration of the epitaxial layer 2 is reduced to increase the breakdown voltage, the current gain of the reverse connection transistor is reduced, and it may not operate sufficiently as I ² L. An object of the present invention is to provide a semiconductor integrated circuit device including I ² L having a high current gain and a bipolar transistor element having a high breakdown voltage, which solves the above-mentioned problems.

[0008]

The present invention has the following constitution in order to achieve the above object. That is, the semiconductor integrated circuit device according to claim 1 is a semiconductor integrated circuit device in which I ² L and a bipolar transistor element are formed in an epitaxial layer of a second conductivity type formed on a semiconductor substrate of a first conductivity type. A buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer below the I ² L and the bipolar transistor element, and I ² L above the buried layer below the I ² L. And a second buried layer of the second conductivity type having a higher concentration than that of the epitaxial layer is provided in the emitter region of the reverse connection transistor constituting the above.

[0009] Claim 2 semiconductor integrated circuit device as claimed, in the semiconductor integrated circuit device according to claim 1, wherein the second embedded layer, the base region and the I ² L of reverse connection transistors constituting the I ² L It is characterized in that it is in contact with the buried layer formed below. A semiconductor integrated circuit device according to claim 3,
The semiconductor integrated circuit device according to claim 1 or 2, wherein the epitaxial layer is composed of two epitaxial layers.

[0010]

According to the semiconductor integrated circuit device of the present invention, I ² L
By forming a high-concentration second-conductivity-type second buried layer above the buried layer in the emitter region of the reverse connection transistor that constitutes the above-mentioned buried layer formed below the bipolar transistor element, A part of the region of the epitaxial layer that serves as the emitter of the reverse connection transistor has a high concentration, and the current gain can be increased.

Regarding the bipolar transistor device,
By providing the buried layer only between the semiconductor substrate and the epitaxial layer, the bipolar transistor element can be formed in the low-concentration epitaxial layer, so that the breakdown voltage can be sufficiently increased. Further, since the second buried layer is formed so that the base region of the reverse connection transistor forming I ² L and the buried layer are in contact with each other, the current gain can be maximized.

Further, the second buried layer can be formed easily and accurately by using the two epitaxial layers forming the semiconductor integrated circuit device.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIG. Incidentally, the same reference numerals are given to the same or corresponding portions as in the conventional case. First, as shown in FIG. 1, the semiconductor integrated circuit device of the present invention has N-type second conductivity type epitaxial layers 2 and 3 formed on a P-type semiconductor substrate 1. 3 is a P ⁺ type diffusion region 22,
23 and the N ⁺ type diffusion region 24, the N ⁺ type diffusion regions 25 and 26 formed in the P ⁺ type diffusion region 23, and the N ⁺⁺ type diffusion region provided in the surface layer portion of the N ⁺ type diffusion region 24. I ² L20 composed of 27, P ⁺ -type diffusion region 42 and N 2
^The bipolar transistor element 40 includes a ⁺ type diffusion region 43 and an N ⁺ type diffusion region 44 formed in the P ⁺ type diffusion region 42.

Then, high-concentration N ⁺ -type buried layers 21 and 41 are formed between the semiconductor substrate 1 and the epitaxial layer 2 below the I ² L 20 and the bipolar transistor element 40, respectively. The N ⁺ -type second buried layer 33 with a concentration is in contact with the P ⁺ -type diffusion region 23 and the buried layer 21 which are the bases of the reverse connection transistors forming the I ² L 40.

As is clear from the figure, I ² L20 is
A lateral transistor having the P ⁺ type diffusion region 22 as an emitter, the N type epitaxial layers 2 and 3 as a base, and the P ⁺ type diffusion region 23 as a collector, and N ⁺ type diffusion regions 25 and 2
6 is a reverse connection transistor having a collector, a P ⁺ type diffusion region 23 as a base, and a second buried layer 33 as an emitter. In particular, the P ⁺ type diffusion region 22 is called an injector because it supplies a forward current to the I ² L20.

The electrodes 28, 29, 30, 31, 32 are formed in the diffusion regions forming the I ² L40, and the electrodes 4 are formed in the diffusion regions forming the bipolar transistor element 40.
5, 46, 47 are provided. The I ² L 20 and the bipolar transistor element 40 are electrically separated by the P ⁺ type diffusion region 50, and the surface of the epitaxial layer 3 is covered with the oxide film 51 except for the electrode portion.

Since the present invention has the above-mentioned structure, the current gain of I ² L and the breakdown voltage of the bipolar transistor element are improved. Next, a method of manufacturing the semiconductor integrated circuit device of the present invention will be described with reference to FIG. First, as shown in FIG. 2A, N ⁺ type buried layers 21 and 41 and isolation regions are formed on the surface of the P type semiconductor substrate 1 at positions where the I ² L portion 20 and the bipolar transistor element 40 are formed. The P ⁺ type diffusion region 52 is formed by the impurity diffusion method or the ion implantation method.

Next, as shown in FIG. 2B, an N-type epitaxial layer 2 is grown on the surface of the P-type semiconductor substrate 1 to form an N-type epitaxial layer 2 in a region where a reverse connection transistor forming I ² L 20 is formed. ^{A +} type second buried layer 33 is formed. The impurities in the N ⁺ type buried layers 21 and 41 and the P ⁺ type diffusion region 52 are also diffused into the epitaxial layer 2 due to the heat when growing the epitaxial layer 2.

Next, as shown in FIG. 2C, the second N-type epitaxial layer 3 is formed on the surface of the N-type epitaxial layer 2.
Grow. The impurities in the N ⁺ -type second buried layer 33 also diffuse into the epitaxial layer 3 due to the heat generated when the epitaxial layer 3 is grown. Next, as shown in FIG. 2D, a P ⁺ -type diffusion region 50 which is in contact with the P ⁺ -type diffusion region 52 already formed in the N-type epitaxial layers 2 and 3 and I
² P ⁺ -type diffusion region 23 serving as the base of the reverse connection transistor of L20 and P ⁺ -type diffusion region 22 serving as the injector
And a P ⁺ type diffusion region 42 serving as the base of the bipolar transistor element are formed by diffusing P type impurities from the surface. In this step, the P ⁺ type diffusion region 52 and P
^{The +} type diffusion region 50 becomes an integral P ⁺ type diffusion region and functions as an isolation region.

Next, as shown in FIG. 2 (e), I ² L2
By diffusing N-type impurities into the N ⁺ -type diffusion region 24 which is in contact with the 0 buried layer 21 and the N ⁺ -type diffusion regions 25 and 26 which are collectors of the reverse connection transistors in the P ⁺ -type diffusion region 23. Formed, P ^{+ of} bipolar transistor device
An N ⁺ type diffusion region 43 serving as an emitter in the type diffusion region 42.
To form. Finally, the oxide film 51 formed on the surface of the epitaxial layer 3 is opened at a predetermined position, and electrodes 28, 29, 30, 31, 32, 45, 4 made of aluminum or the like are formed.
6, 47 are diffused regions 24, 22, 25,
26, 23, 3, 44, 42. The electrode 2
N ⁺ type diffusion regions 27 and N ⁺ type diffusion regions 43 are provided at 8 and 45 to reduce electric resistance.

In this way, the semiconductor integrated circuit device of the present invention including I ² L and a normal bipolar transistor element can be obtained. In this embodiment, the case where the P-type semiconductor substrate is used has been described, but when the N-type semiconductor substrate is used, the conductivity (P and N) of each of the above constituent parts may be replaced.

[0022]

As described above, according to the semiconductor integrated circuit device of the present invention, the high-concentration second conductivity type second layer is formed above the buried layer in the emitter region of the reverse connection transistor forming I ² L. Since the 2 buried layer is formed above the buried layer formed below the bipolar transistor element, a part of the region of the epitaxial layer serving as the emitter of the reverse connection transistor has a high concentration and the current gain can be increased. it can.

Regarding the bipolar transistor device,
By providing the buried layer only between the semiconductor substrate and the epitaxial layer, the bipolar transistor element can be formed in the low-concentration epitaxial layer, so that the breakdown voltage can be sufficiently increased. Since the second buried layer is formed so that the base region of the reverse connection transistor forming I ² L and the buried layer are in contact with each other, the current gain can be maximized.

Further, the second buried layer can be formed easily and accurately by using the two epitaxial layers forming the semiconductor integrated circuit device.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a semiconductor integrated circuit device of the present invention.

FIG. 2 is an explanatory view showing a method for manufacturing a semiconductor integrated circuit device of the present invention.

FIG. 3 is an explanatory diagram showing a conventional semiconductor integrated circuit device.

[Explanation of symbols]

1 Semiconductor Substrate 2,3 Epitaxial Layer 20 I ² L 21,33 Buried Layer 22,23 P ⁺ Diffusion Region 24,25,26 N ⁺ Diffusion Region 27 N ⁺⁺ Diffusion Region 40 Bipolar Transistor Element 41 Buried Layer 42 P ⁺ type diffusion region 43,44 N ⁺ type diffusion region 28 to 32,45 to 47 Electrode 50 Separation diffusion region 51 Oxide film

Claims (3)

[Claims] 1. Formed on a semiconductor substrate of the first conductivity type
I in the epitaxial layer of the second conductivity type² L and bipo
-Semiconductor integrated circuit device in which a transistor element is formed
In the above I² L and bipolar transistor elements
Between the semiconductor substrate below the child and the epitaxial layer
And a second conductivity type buried layer, ² Embedded below L
I above the layer² The reverse connection transistor that composes L
Second conductivity type with a higher concentration than the epitaxial layer in the miter region
Integrated circuit having a second buried layer of
apparatus. Wherein said second embedded layer, according to claim 1, characterized in that contact with the buried layer formed under the base region and the I ² L of reverse connection transistors constituting the I ² L Semiconductor integrated circuit device. 3. The semiconductor integrated circuit device according to claim 1, wherein the epitaxial layer is composed of two epitaxial layers.