JPH11121768A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce leak current to a board as well as to raise the reverse direction breakdown strength. SOLUTION: A semiconductor integrated circuit separates on N<-> -type epitaxial silicon layer 22 formed on a P<+> -type silicon board 21 to the N<-> -type epitaxial silicon layer 22a, 22b by P<+> -type isolation diffuse layer 23, 26; together with forming N<+> -type buried region 24 and P<+> -type buried region 25 at the boundary between the layer 22 and the board 21. And the has device cathode electrode 30 connected to the layer 22b, and a diode provided with both an anode electrode 31 connected to both the layer 26 and the layer 22a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor integrated circuit, and more particularly, to a semiconductor integrated circuit having a diode composed of transistors as basic components.

[0002]

2. Description of the Related Art FIG. 2A is a cross-sectional view showing a first schematic structure example of a diode constituting a conventional bipolar semiconductor integrated circuit, and FIG. 2B is an equivalent circuit diagram thereof. In FIG. 2A, an N ⁻ -type epitaxial silicon layer 2 is formed on a P-type silicon substrate 1, and an annular P ⁺ -type isolation diffusion layer 3 is formed from the surface thereof.
It is formed to reach the mold silicon substrate 1. The P ⁺ -type isolation diffusion layer 3 electrically isolates the surrounding N ⁻ -type epitaxial silicon layer 2 a from the surroundings as a diode element formation region. At the boundary between the separated N ⁻ -type epitaxial silicon layer 2a and the P-type silicon substrate 1, an N ⁺ -type buried region 4 is formed. On the surface of the N ⁻ -type epitaxial silicon layer 2a,
A P-type impurity region 5 is formed, and in the vicinity thereof,
An N ⁺ type impurity region 6 is formed.

[0003] These various impurity region is formed N ^-
On the surface of the type epitaxial silicon layer 2, a silicon oxide film 7 is formed as an insulating film. On the silicon oxide film 7 in the element formation region, an anode electrode 8 and a cathode electrode 9 which are in ohmic contact with the P-type impurity region 5 and the N ⁺ -type impurity region 6 through contact holes, respectively, are formed by patterning an aluminum deposition film. Is formed.

Accordingly, in this diode, as shown in FIG. 2B, the emitter of the PNP transistor is an anode A and the base is a cathode K. Further, the P-type silicon substrate 1 and the P ⁺ -type isolation diffusion layer 3 constitute a collector of the PNP transistor.

FIG. 3A is a sectional view showing a second schematic structure example of a diode constituting a conventional bipolar semiconductor integrated circuit, and FIG. 3B is an equivalent circuit diagram thereof.
In FIG. 3A, parts corresponding to the respective parts in FIG. 2A are denoted by the same reference numerals, and description thereof will be omitted. FIG.
(A), the coefficients of the and the N ⁺ type impurity region 10 within the P-type impurity region 5 is formed, N ⁺ -type impurity region 10
Has the same structure as an NPN transistor having an emitter, a P-type impurity region 5 as a base, and an N ⁻ -type epitaxial silicon layer 2 as a collector. An anode electrode 11 in ohmic contact with both the P-type impurity region 5 and the N ⁺ -type impurity region 6 through a contact hole on the silicon oxide film 7 in the element formation region, and an ohmic contact with the N ⁺ -type impurity region 10. The contacted cathode electrode 12 is formed by patterning an aluminum deposition film.

Accordingly, in this diode, as shown in FIG. 3B, the collector and base of the NPN transistor are short-circuited to form an anode A, and the emitter to a cathode K.

[0007]

By the way, in the above-mentioned first schematic structure example of the conventional diode, when the diode is operated by applying a forward bias, as shown in FIG. Parasitic PN 5 as an emitter, N ⁻ type epitaxial silicon layer 2 as a base, P ⁺ type isolation diffusion layer 3 and P type silicon substrate 1 as collectors
The P-transistor operates, and the P-type silicon substrate 1
Since a leakage current of the order of mA flows, there is a problem that the forward characteristics are deteriorated and the power consumption of the semiconductor integrated circuit is increased.

In the above-mentioned second schematic structure of the conventional diode, the PN junction between the N ⁺ -type impurity region 10 and the P-type impurity region 5 becomes the active region of the diode. In addition to the fact that the impurity concentration of the N ⁺ -type impurity region 10 is higher than the impurity concentration of the P-type impurity region 5 serving as the anode A, the thickness of the P-type impurity region 5 is small, so that the electrons and holes at the junction are The extent of the depletion layer, which is a nonexistent region, must be reduced, the electric field intensity applied to the active region increases, and a sufficient reverse breakdown voltage (6 to 7 V, 1-2 in the miniaturization process).
V) cannot be obtained. Therefore, there is a problem that the usage is limited.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a semiconductor integrated circuit having a diode having a high reverse breakdown voltage and a small leak current to a substrate.

[0010]

In order to solve the above-mentioned problems, a semiconductor integrated circuit according to the first aspect of the present invention has a first structure.
A second conductive type low-concentration epitaxial semiconductor layer formed on the conductive type semiconductor substrate; and a second conductive type low-concentration epitaxial semiconductor layer surrounding a predetermined region of the second conductive type low-concentration epitaxial semiconductor layer. A first first-conductivity-type high-concentration isolation diffusion layer formed to reach the first-conductivity-type semiconductor substrate and electrically separated from the surroundings by using the predetermined region as a device-forming region; A second conductivity type high-concentration buried region formed in a predetermined region at a boundary with the conductive type semiconductor substrate; and a second region formed at a boundary between the element formation region and the second conductivity type high-concentration buried region. A first conductivity type high-concentration buried region, and a predetermined region above the first conductivity-type high-concentration buried region in the element formation region; Conductive A second first-conductivity-type high-concentration isolation diffusion layer formed reaching the high-concentration buried region and electrically separating the predetermined region as a diode active region from the surroundings; and electrically connected to the diode active region The first electrode, the second first conductivity type high concentration isolation diffusion layer, and the first and second first conductivity type high concentration isolation diffusion layers. And a second electrode electrically connected to both the low-concentration epitaxial semiconductor layer and a low-concentration epitaxial semiconductor layer.

According to a second aspect of the present invention, there is provided the semiconductor integrated circuit according to the first aspect, wherein the first and second first-conductivity-type high-concentration isolation diffusion layers are both annular. And

[0012]

According to the semiconductor integrated circuit having the structure of the present invention, the second conductive type low-concentration epitaxial semiconductor layer electrically separated from the surroundings by the second first conductive type high-concentration isolation diffusion layer is provided in the diode active region. However, since the impurity concentration is low, the reverse breakdown voltage is high. In addition, the second first
A conductive type high concentration isolation diffusion layer;
Since both the first conductive type high concentration isolation diffusion layer and the second conductive type low concentration epitaxial semiconductor layer surrounded by the first conductive type high concentration isolation diffusion layer are electrically connected by the second electrode, the parasitic transistor does not operate. Leakage current to the first conductivity type substrate is small.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. The description will be specifically made using an embodiment. FIG. 1A is a sectional view showing a schematic structure of a diode constituting a semiconductor integrated circuit according to an embodiment of the present invention, and FIG. 1B is an equivalent circuit diagram thereof. FIG.
3A, an N ⁻ -type epitaxial silicon layer 22 is formed on a P-type silicon substrate 21 and an annular P ⁺ -type isolation diffusion layer 23 is formed from the surface thereof.
Are formed to reach the P-type silicon substrate 21. The P ⁺ -type isolation diffusion layer 23 has a N ⁻
The type epitaxial silicon layer 22a is electrically isolated from the surroundings as a diode element formation region. The boundary between the separated N ⁻ -type epitaxial silicon layer 22a and the P-type silicon substrate 21 has an N ⁺ -type buried region 24.
However, a P ⁺ type buried region 25 is further formed thereon. An annular P ⁺ -type isolation diffusion layer 26 is formed from the surface of the N ⁻ -type epitaxial silicon layer 22a to reach the P ⁺ -type buried region 25. The P ⁺ -type isolation diffusion layer 26 electrically isolates the surrounding N ⁻ -type epitaxial silicon layer 22 b from the surroundings. N ^- type on the surface of the epitaxial silicon layer 22b N ₊ -type impurity region 27 is formed, near the P ⁺ -type isolation separated by diffusion layers 26 N ^- on the surface of type epitaxial silicon layer 22a N ⁺ -type Impurity region 28 is formed.

The N ⁻ in which these various impurity regions are formed
On the surface of the type epitaxial silicon layer 22, a silicon oxide film 29 is formed as an insulating film. On the silicon oxide film 29 formed on the N ⁻ -type epitaxial silicon layer 22b, a cathode electrode 30 in ohmic contact with the N ⁺ -type impurity region 27 through a contact hole is formed by patterning an aluminum vapor deposition film. . Further, the P ⁺ -type isolation diffusion layer 26 near the N ⁺ -type impurity region 27 and the silicon oxide film 29 formed on the N ⁻ -type epitaxial silicon layer 22a have a P ⁺ -type An anode electrode 31 in ohmic contact with both the diffusion layer 26 and the N ⁺ -type impurity region 28 is formed by patterning an aluminum vapor deposition film.

Accordingly, in this diode, as shown in FIG. 1B, the N ⁻ type epitaxial silicon layer 22a is a collector, the P ⁺ type isolation diffusion layer 26 and the P ⁺ type buried region 25 are bases, and the N ^{− type} an anode a -type epitaxial silicon layer 22b are short-circuited and the collector and base of the NPN transistors T ₁ to the emitter, and the emitter and cathode K. Thereby, the P ⁺ -type isolation diffusion layer 26 and the PN junction between the P ⁺ -type buried region 25 and the N ⁻ -type epitaxial silicon layer 22b become the active region of the diode. In this case, N serving as the cathode K
^Since the impurity concentration of the-type epitaxial silicon layer 22b is lower than the impurity concentration of the P ⁺ -type isolation diffusion layer 26 and the P ⁺ -type buried region 25 serving as the anode A, the expansion of the depletion layer at the time of reverse bias is increased by N ^-- type epitaxial. Since it is large in the silicon layer 22b, a sufficient reverse breakdown voltage can be obtained. Moreover, the reverse breakdown voltage is
N ^- type epitaxial silicon layer 22 of a semiconductor integrated circuit
It is determined by process parameters such as thickness and impurity concentration, so that there is no design restriction.

Further, as shown in FIG. 1B, in this structure, the P ⁺ type isolation diffusion layer 26 and the P ⁺
Buried region 25 as an emitter, N ⁻ -type epitaxial silicon layer 22a as a base, P-type silicon substrate 21 and P ⁺
PNP with the collector isolation diffusion layer 23 as the collector
Parasitic transistor T _P is present, but because of the short-circuited emitter and base of the PNP parasitic transistor T _P, does not work. Therefore, leak current hardly flows through the P-type silicon substrate 21. As described above, according to the configuration of this example, a diode having a high reverse breakdown voltage and a small leak current to the P-type silicon substrate can be configured, so that the number of external components of the semiconductor integrated circuit can be reduced as compared with the related art. it can. Further, since a wired circuit can be formed, the circuit scale of the semiconductor integrated circuit can be reduced.

Although the embodiment of the present invention has been described in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and changes in the design and the like can be made without departing from the gist of the present invention. Even if there is, it is included in the present invention. For example, in the above embodiment, the P ⁺ type isolation diffusion layer 2
Although an example is shown in which both 3 and 26 are formed in a ring shape, the present invention is not limited to this. In short, the P ⁺ -type isolation diffusion layer 23 the N ^- -type epitaxial silicon layer 22a can electrically isolated from the surrounding, also, a P ⁺ -type isolation diffusion layer 26 together with the P ⁺ type buried region 25 N ^- -type epitaxial Any shape may be used as long as the silicon layer 22b can be electrically separated from its surroundings. Further, in the above-described embodiment, an example in which a P-type (first conductivity type) silicon substrate is used has been described, but an N-type (second conductivity type) silicon substrate is used and the conductivity type of each impurity region is reversed. By doing so, it is possible to configure a diode having the same function and effect.

[0018]

As described above, according to the semiconductor integrated circuit of the present invention, the second conductive type low-concentration epitaxial layer electrically separated from the surroundings by the second first conductive type high-concentration isolation diffusion layer. Although the semiconductor layer is a diode active region, the reverse breakdown voltage is high because the impurity concentration is low. In addition, both the second first conductivity type high concentration isolation diffusion layer and the second conductivity type low concentration epitaxial semiconductor layer surrounded by the first and second first conductivity type high concentration isolation diffusion layers. Are electrically connected by the second electrode, the parasitic transistor does not operate, and the leakage current to the first conductivity type substrate is small.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a schematic structure of a diode constituting a semiconductor integrated circuit according to an embodiment of the present invention, and an equivalent circuit diagram thereof.

FIG. 2 is a sectional view showing a first schematic structure example of a diode constituting a conventional semiconductor integrated circuit, and an equivalent circuit diagram thereof.

FIG. 3 is a cross-sectional view showing a second schematic structure example of a diode constituting a conventional semiconductor integrated circuit, and an equivalent circuit diagram thereof.

[Explanation of symbols]

1,21 P-type silicon substrate (first conductivity type semiconductor substrate) 2,2a, 22,22a, 22b N ⁻ -type epitaxial silicon layer (second conductivity type low-concentration epitaxial semiconductor layer) 3,23,26 P ⁺ -type Isolation diffusion layer (first and second first-conductivity-type high-concentration isolation diffusion layers) 4,24 N ⁺ -type buried region (second-conductivity-type high-concentration buried region) 5 P-type impurity region 6,10 , 27, 28 N ⁺ type impurity region 7, 29 Silicon oxide film 8, 11, 31 Anode electrode (second electrode) 9, 12, 30 Cathode electrode (first electrode) 25 P ⁺ type buried region (second first conductivity type high concentration buried region) T ₁ NPN transistor T _P PNP parasitic transistor

Claims (2)

[Claims] A second conductive type low-concentration epitaxial semiconductor layer formed on a first conductive type semiconductor substrate; and a second conductive type low-concentration epitaxial layer around a predetermined region of the second conductive type low-concentration epitaxial semiconductor layer. A first first-conductivity-type high-concentration isolation diffusion layer formed from the surface of the epitaxial semiconductor layer to reach the first-conductivity-type semiconductor substrate, and electrically separated from the surroundings by using the predetermined region as an element formation region; A second conductivity type high-concentration buried region formed in a predetermined region at a boundary between an element formation region and the first conductivity type semiconductor substrate; and a boundary between the element formation region and the second conductivity type high-concentration buried region A first conductivity type high concentration buried region formed in a predetermined region of the second conductivity type low concentration epitaxial semiconductor around a predetermined region above the first conductivity type high concentration buried region in the element formation region Layer of A second first-conductivity-type high-concentration isolation diffusion layer formed from the surface to reach the first-conductivity-type high-concentration buried region, and electrically separating the predetermined region as a diode active region from the surroundings; A first electrode electrically connected to an active region, the second first conductivity type high concentration isolation diffusion layer, and the first and second first conductivity type high concentration isolation diffusion layers. A semiconductor integrated circuit, comprising: a diode including a second electrode electrically connected to both an enclosed second-conductivity-type low-concentration epitaxial semiconductor layer. 2. The semiconductor integrated circuit according to claim 1, wherein said first and second first conductivity type high-concentration isolation diffusion layers are both annular.