JPS6355871B2 - - Google Patents

Info

Publication number
JPS6355871B2
JPS6355871B2 JP57086012A JP8601282A JPS6355871B2 JP S6355871 B2 JPS6355871 B2 JP S6355871B2 JP 57086012 A JP57086012 A JP 57086012A JP 8601282 A JP8601282 A JP 8601282A JP S6355871 B2 JPS6355871 B2 JP S6355871B2
Authority
JP
Japan
Prior art keywords
diffusion region
input
pad electrode
electrode
input pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57086012A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58202573A (ja
Inventor
Takehide Shirato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57086012A priority Critical patent/JPS58202573A/ja
Publication of JPS58202573A publication Critical patent/JPS58202573A/ja
Publication of JPS6355871B2 publication Critical patent/JPS6355871B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Protection Of Static Devices (AREA)
  • Amplifiers (AREA)
JP57086012A 1982-05-21 1982-05-21 半導体集積回路装置 Granted JPS58202573A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57086012A JPS58202573A (ja) 1982-05-21 1982-05-21 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57086012A JPS58202573A (ja) 1982-05-21 1982-05-21 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS58202573A JPS58202573A (ja) 1983-11-25
JPS6355871B2 true JPS6355871B2 (en, 2012) 1988-11-04

Family

ID=13874765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57086012A Granted JPS58202573A (ja) 1982-05-21 1982-05-21 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS58202573A (en, 2012)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0746717B2 (ja) * 1985-05-17 1995-05-17 日本電気株式会社 半導体装置
US4806999A (en) * 1985-09-30 1989-02-21 American Telephone And Telegraph Company, At&T Bell Laboratories Area efficient input protection
DE3681160D1 (de) * 1985-10-15 1991-10-02 American Telephone & Telegraph Schutz eines igfet integrierten schaltkreises vor elektrostatischer entladung.

Also Published As

Publication number Publication date
JPS58202573A (ja) 1983-11-25

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