JPS6353963A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a resistor having a desired resistance value with high accuracy by performing a trimming through an oxygen ion implantation into the resistor that is formed at an active layer. CONSTITUTION:n-type layers 2; that is, FET and a resistor are formed on a semi-insulated GaAs substrate 1. And when a contact hole to an insulation film 4 is formed, the insulation film 4 to the surface of the resistor is simultaneously removed. Then, after measuring a resistance value of the resistor through a removed opening part, oxygen ion is implanted so that a desired value can be obtained. In such a case, the resistance value can be controlled by adjusting the implanted energy and dosage.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a resistor for a compound semiconductor integrated circuit, mainly a GaASIC.

[Conventional technology]

One method for forming resistors in GaAs ICs is ion implantation. In this method, an n-type conductive region is formed by implanting impurities such as Si into a semi-insulating GaAs substrate. The resistance value at this time is determined by the implantation energy, dose amount, and pattern size of the implanted region, so
To design a desired resistance value, various parameters are determined based on previously obtained data.

FIGS. 2(a) to (C) are diagrams showing the manufacturing process of a conventional GaAs IC. First, as shown in FIG. 2(a), a resist pattern of a photoresist 6 is formed on a semi-insulating GaAs substrate 1. Si as a mask.

The n-type active layer 2 is formed by implanting n-type impurities such as the following, and annealing at a high temperature. In FIG. 2, this n-type active layer 2 has a region on the left that becomes an FET, and a region on the right that becomes a resistor. Next, as shown in FIG. 2(b), a metal for forming an ohmic contact is deposited and lifted off (intermediate steps are omitted) to form a metal wiring 3. At this time, the left and right metal wiring 3 that continued to the FET area is connected to the FE
The metal wiring 3, which becomes the source and drain electrodes of T and is connected to the resistance region, becomes the ohmic electrode of the resistance. Subsequently, as shown in FIG. 2C, after a gate metal 5 is deposited on the FET region to form an FET, the surface is covered with an insulating film 4 as a protective film.

As mentioned above, the resistor can be formed at the same time as the FET operating region, which has the advantage of not increasing the number of steps, but the implantation energy and dose are determined based on the FET operating characteristics. However, it also has the disadvantage that there is no freedom in designing the resistance value other than the pattern size.

Note that, in addition to FETs and resistors, inductors and capacitors are also formed in the GaAs IC, but illustration thereof is omitted here.

[Problem that the invention seeks to solve]

GaAs ICs formed as described above are mainly used for high-frequency operation, but in high-frequency circuits, it is extremely necessary to change the values of non-active elements such as resistors and inductors while checking their operation. expensive. This is called trimming. However, resistors made by conventional methods have the disadvantage that once the values are determined at the time of pattern design, they cannot be changed in subsequent steps.

The present invention has been made to solve the above-mentioned problems, and provides a method for manufacturing a semiconductor device in which the value of the resistor can be trimmed in the latter half of the process.

[Means for solving problems]

The method for manufacturing a semiconductor device according to the present invention exposes the surface of the resistor of the substrate on which the FET has been formed to enable measurement of the resistance value, and further implants oxygen ions into the resistor to measure the resistance value. It is for trimming.

[Effect]

In this invention, oxygen ions are implanted into the n-type active layer and the phenomenon in which the conductivity decreases is utilized, so by implanting these oxygen ions into the resistor, the resistance value is trimmed, and the implantation energy is By controlling the amount and dose, the resistance value can be trimmed to a desired value.

〔Example〕

An embodiment of the present invention will be described with reference to FIGS. 1(a) to 1(d).

First, as shown in Figures 1 (a) to (C), Figure 2 (a)
) to (C), semi-insulating GaAs substrate I
An n-type active layer 2, that is, an FET and a resistor are formed on J:. Next, when forming a contact hole in the insulating film 4, the insulating film 4 on the surface of the resistor is also peeled off at the same time. Furthermore, after measuring the resistance value of the resistor through the peeled opening of the insulation B24, as shown in FIG. 2(d), oxygen ions are implanted to measure a desired resistance value. In this case, the resistance value can be controlled by the implantation energy and dose.

In addition, in this embodiment, when oxygen ions are implanted, the surface of the other semi-insulating GaAs substrate 1 is fully bent wiring 3, insulation +124
No special mask is required for injection. Therefore, the only increase in the number of steps is oxygen ion implantation.

In addition, as a method for trimming the resistance value in the latter half of the process, similar to the oxygen ion implantation method, FIG.
It is also possible to wet-etch the resistor itself after forming the pattern shown in (d). However, the gate metal 5. Since the space between the metal wiring lines 3 has a racked shape as shown in FIG. 3, wet etching is not suitable because the etching proceeds through the cracks and damages the n-type active layer 2 of the transistor.

On the other hand, in the case of oxygen ion implantation, the insulating film 4 having the shape as shown in FIG. 3 serves as a sufficient implant blocking film, and the resistance value can be set to a desired value without adversely affecting the transistor.

In the above embodiment, the case where GaAs is used as the compound semiconductor has been described, but the resistance value control by oxygen ion implantation of the present invention has similar effects when forming an IC using other compound semiconductors.

〔Effect of the invention〕

As explained above, this invention provides an I
In the C manufacturing process, after forming a contact hole in the insulating film on the metal wiring and removing the insulating film on the resistor,
Since the resistor is trimmed to a desired resistance value by implanting oxygen ions into the resistor, the resistance value of the resistor can be accurately controlled to a desired value.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the manufacturing process of GaASIC according to an embodiment of the present invention, FIG. 2 is a diagram showing the manufacturing process of conventional GaAs1C, and FIG. 3 is a diagram showing an example of the deposition shape of an insulating film by the CVD method. It is. In the figure, 1 is a semi-insulating GaAs substrate, 2 is an n-type active layer, 3 is a metal wiring, 4 is an insulating film, and 5 is a gate metal. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] In a method for manufacturing a semiconductor device using a compound semiconductor in which an active layer of one conductivity type is formed on a substrate and one active layer is used as a resistor, an insulating film formed on the resistor is applied to a metal wiring. 1. A method of manufacturing a semiconductor device, comprising: forming and removing a contact hole, and then implanting oxygen ions into the resistor to trim it to a desired resistance value.