JPS6352469B2 - - Google Patents
Info
- Publication number
- JPS6352469B2 JPS6352469B2 JP58172603A JP17260383A JPS6352469B2 JP S6352469 B2 JPS6352469 B2 JP S6352469B2 JP 58172603 A JP58172603 A JP 58172603A JP 17260383 A JP17260383 A JP 17260383A JP S6352469 B2 JPS6352469 B2 JP S6352469B2
- Authority
- JP
- Japan
- Prior art keywords
- metal plate
- conductive path
- package
- metal
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58172603A JPS6064454A (ja) | 1983-09-19 | 1983-09-19 | チツプキヤリアおよびその製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58172603A JPS6064454A (ja) | 1983-09-19 | 1983-09-19 | チツプキヤリアおよびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6064454A JPS6064454A (ja) | 1985-04-13 |
| JPS6352469B2 true JPS6352469B2 (cs) | 1988-10-19 |
Family
ID=15944917
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58172603A Granted JPS6064454A (ja) | 1983-09-19 | 1983-09-19 | チツプキヤリアおよびその製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6064454A (cs) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0758744B2 (ja) * | 1987-04-02 | 1995-06-21 | イビデン株式会社 | 半導体塔載用基板の製造方法 |
-
1983
- 1983-09-19 JP JP58172603A patent/JPS6064454A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6064454A (ja) | 1985-04-13 |
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