JPS6351669A - Frame transfer solid-state image pickup element - Google Patents

Abstract

PURPOSE:To reduce the thermal noise charge of an FT sensor and to simplify the structure and manufacturing process of the FT sensor by a method wherein the potential of an overflow barrier region is set shallower than those of opening regions for the period of signal charge storage. CONSTITUTION:Boron ions are implanted in a CH-B region 6, a thin insulating film 14 is formed in the surface of a region 15, transfer electrodes 9a and 9b are provided thereon and thereafter, boron ions are implanted in the surfaces of opening regions 4a and 4b. Then, phosphorus ions are implanted in an overflow drain region 1 surrounded with a channel stop region 3 and a CH-B region 2. The overflow barrier region 2 can be munufactured by the same process as those of the opening regions 4a and 4b. The channel width of the region 2 can be made very thin by the effect of bird's beak. As a result, the channel potential of the overflow barrier region 2 can be set shallower by a constant voltage than those of the opening regions due to a narrow channel effect. Moreover, as signal charge can be stored in the opening regions as well for the period of signal charge storage, the dynamic range is improved and as the field strength in the surface of a CCD channel at that time is small, th generation of thermal noise charge is lessened.

Description

Detailed Description of the Invention Technical Field The present invention relates to a frame transfer type CCD solid-state image sensor (
+? It is abbreviated as i'senza. ), in particular with a vertical or horizontal overflow drain I? '1' Regarding the sensor.

BACKGROUND ART An F i' sensor in which a Δ register also serves as a pixel column is well known and has good horizontal resolution and good light sensitivity. As is well known, the FT sensor includes a Δ register that also serves as a pixel column, a B register that temporarily stores signal charges 6:f, and a C register that horizontally transfers signal charges to an amplifier. Furthermore, FT sensors have been proposed in which the above-mentioned B register is omitted. The driving methods for the above Δ register are 1 phase, 2 phase, 3 phase, 4 phase.
Many transfer methods are known, such as phase, IE/B, 2E/B, and modified IE/B. Regarding each of the above E/I'3 transfer methods, please refer to, for example, Japanese Patent Laid-Open No. 61-67376 filed by the present applicant.

Generally, in order to improve blue sensitivity, an FT sensor has an aperture area adjacent to the CCD, which is the A register, and the signal charge generated in the aperture area is transferred to the CCD of the A register.
I) Accumulated in the channel region (ie potential well region).

F'T sensors also generally include a vertical or horizontal overflow drain region to remove excess signal charge.

The CCD channel region of the A register and the overflow drain region (OF'D) are electrically connected via an overflow barrier region (Or''B).

DISCLOSURE OF THE INVENTIONDespite the above-mentioned advantages of the frame transfer CCD solid-state image sensor (F'l' sensor), the mainstream of current development is the incline transfer type CCD solid-state image sensor (11
(sensor). Part 1: Original prisoners are relatively natural noise electricity 6
This is because the FT sensor is considerably wider than the 1'1' sensor in terms of the total area of the CCD channel area where :r generation is large. Output noise can be significantly improved by noise removal circuits such as CDS, and reducing thermal noise is important for improving signal-to-noise ratio. The second reason is that the structure of the F'r sensor also becomes complicated due to the addition of an aperture area and the addition of an OFD structure. One of the advantages of conventional FT sensors was that they were simple in structure and manufacture, but the addition of the above structure does not diminish that advantage. In particular, due to the addition of the vertical OFD structure (P-well structure), the F'r sensor, which has a large chip area (P-well area), has a lower yield than the IT sensor. Horizontal type
Addition of the D structure reduces the optical sensitivity (aperture ratio) and horizontal resolution, which are advantages of the FT sensor, and increases the manufacturing process.

Therefore, it is an object of the present invention to improve the above-mentioned problems of F'r sensors. A specific objective of the present invention is to reduce thermal noise charges in F'I' sensors. Another specific objective of the invention is to improve the performance of F 1' sensors. Another specific object of the present invention is to simplify the structure and manufacturing process of the F'1 sensor.

The basic features of the invention are explained below.

(1) An A register that also serves as one pixel column, and a vertical or horizontal overflow drain structure that determines the maximum charge amount of the A register, and the overflow drain structure described above is substantially the maximum charge amount of the Δ register. In a frame transfer CCD solid-state image sensor, a part or all of the pixels in the EU element array are has a channel region of the CCD which is an A register and an aperture region installed adjacent to it, and the above overflow [the voltage of the non-barrier region (+'t, is the charge of the aperture region described in - during the signal charge accumulation period]. A frame transfer (CCI) solid-state imaging device characterized by being set shallower than the potential.

(2) The frame transfer CCD solid-state image pickup device according to item 1, further comprising a horizontal overflow barrier region connecting the opening region described in item 1- and the horizontal overflow drain region.

(3) a horizontal overflow drain region and a horizontal overflow C1-barrier region; The frame transfer CCD solid-state imaging device described above.

(4) Frame 1 according to item 1, characterized in that the Δ register described in l is driven by the IE/B transfer method.
4-transfer CCD solid-state image sensor.

A detailed description and advantages of the present invention are explained below.

Independent invention 1 Claim 1 In general, F'r sensors have a larger CC than IT sensors.
Since it has an area of D, the dark current noise charge generated mainly on the channel surface of CCI increases.

In reality, the thermal noise charge in the A register is much larger than the thermal noise charge in the B register. In order to dissipate the thermal noise charge of the A register, the transfer electrode of the CCD, which is the A register, should be
A shallow clock voltage VL may be applied during the signal charge accumulation period. As a result, the electric field strength at the channel surface of the CCD, which is the A register, is reduced, and thermal noise charge generation is reduced. However, the shallow potential Vt is a potential in a more negative direction in the N channel cc), and the deep potential VI-1 is a potential in a more positive direction. In a preferred embodiment, during the signal charge accumulation period, the bulk channel surface under each transfer electrode is inverted and pinning. In this way, the dark current noise component is greatly reduced.

However, if a shallow potential VL is applied to the transfer electrode of the A register during the signal charge accumulation period, there is a drawback that the charge accumulation ability, that is, the dynamic range of the A register is reduced.

In order to solve this problem, the present invention provides an I'''r sensor with an overflow drain structure and an opening area.
The feature is that the potential of the overflow barrier region is set to be shallower than the potential of the opening region during the signal charge accumulation period. In this way, signal charges can also be accumulated in the aperture region during the signal charge accumulation period, so that the charge accumulation ability of the A register can be improved. Naturally, the potential well region (abbreviated as CI-W) of the °A register that stores signal charges has a deeper potential than the above-mentioned opening region, and is located between two vertically adjacent CII-W regions. The potential barrier region (abbreviated as CII-L') of the A resistor installed in has a potential shallower than the potential of the above-mentioned overflow barrier region.

Dependent Invention 1 Claim 2 In a preferred embodiment of clay 1.1, a horizontal overflow drain structure is installed adjacent to the bipedal opening area. That is, a horizontal overflow barrier region is installed between the opening region and the horizontal overflow drain region. In this way, the potential change in the opening region is small, so that the channel of the horizontal overflow barrier region can be shortened. That is, even if the channel in the overflow barrier region is shortened, punch-through between the opening region and the overflow drain region does not occur. When an overflow barrier region is installed adjacent to a channel region of a CCD that is an A register, it is necessary to prevent pan de-through due to potential changes in the CCD channel region, and the horizontal overflow barrier region requires a certain channel length. Furthermore, determining the potential of the overflow barrier region becomes complicated.

Dependent Invention 2 Clay A 3 In the preferred embodiment of claim I, the horizontal overflow barrier region of the FT sensor is made in the same manufacturing process as the aperture region. Then, the tunnel effect is used to make the potential of the two-legged overflow barrier region shallower than the potential of the opening region. In this way, a horizontal overflow barrier region having a potential shallower than the opening region by a certain amount can be manufactured very easily.

Dependent Invention 3 Clay 1.4 In the preferred embodiment of claim I, the above registers are driven by the IE/T3 transfer method.

Since the IE/[3 transfer method described above has a large charge transfer capability, claim 1 is preferred since it can achieve a small thermal noise and a large charge storage capability.

Furthermore, the F of the present invention having a horizontal overflow [1-drain structure]
The 'v sensor has the advantage of not requiring a cI knock transfer electrode over the lateral overflow barrier region. As a result, the overflow drain structure becomes simple. Other features and advantages of the invention are described below.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention with a Δ register driven by IE/[one-transfer method or two-phase knock transfer method;
FIG. 1 is a plan view of one embodiment of a sensor.

Each pixel is surrounded by a channel stop region 3, an overflow barrier region 2, and a channel barrier region 6.

Therefore, each pixel is composed of aperture regions 4a, 4b and a channel well region 5. Channel barrier (CH-B)
The region 6 is the so-called potential barrier region of the two-phase CCD, which is the A resistor 8 . Channel well (CH-W) area 5
is the so-called potential well region of the above two-phase CCD. Naturally, transfer electrodes 9a and 9b are provided above the CH-B and CH-W regions with an insulating film interposed therebetween. The first layer electrode 9a and the first layer electrode 9 are separated from each other by an insulating film.
a is installed horizontally above the channel stop area 3. The opening region 4b and the horizontal overflow drain region 1 are electrically connected by the horizontal overflow barrier region 2. Then, a contact hole is made in the thin insulating film on the surface of the N1 overflow drain region.
A third color aluminum electrode wire 7 is placed thereon. This electrode line 7 supplies voltage to the overflow drain region 1 and has a light shielding function.

FIG. 2 is a cross-sectional view taken along the line A-A'' in FIG. 11
An N-type bulk channel region 15 is provided on the surface. Then, in order to form a potential barrier in the CH-B region 6,
-B region 6 is implanted with boron ions. and area 1
A thin insulating film I4 is placed on the surface of the electrode 5, and transfer electrodes 9a and 9b are placed thereon. Naturally, the transfer Ti electrodes 9a in the odd (even) pixel rows and the transfer electrodes 9b in the even (odd) pixel rows are electrode lines in different layers. Thereafter, boron ions are implanted into the surfaces of the opening regions 4a and 4b. As a result, the surface potential of the opening regions 4a, 4b is fixed at OV (substrate potential). Next, phosphorus ions are implanted into the overflow drain region l surrounded by the channel stop region 3 and the CII-13 region 2. The thin insulating film on the surface of the N+ overflow drain region I is removed and the contact hole 7 is removed.
a is installed, and a third layer aluminum wire is installed on top of it.

What is understood from the above description is that the overflow barrier region 2 can be manufactured by the same process as the opening regions 4a and 4b. The channel width of region 2 can be made very narrow due to the bird's beak effect. As a result, the channel potential of the overflow barrier region 2 can be set shallower than the potential of the opening region by a certain voltage due to the narrow channel effect.

Furthermore, since there is no need to install a transfer electrode to control the potential on the surface of the overflow barrier region 2, the electrode line 7
The installation of the contact hole 7a and the installation of the contact hole 7a become easier.

FIG. 4 is a sectional view taken along line B-B' in FIG.

FIG. 3 is a channel potential diagram of one embodiment of FIG.

The VL of the CH-B region 6 is +5■, and the VH (deep potential) is +IIV. C) ■Lli+ of I-W area 5
IOV and VHf; t+17V. Opening area 4
The bulk channel potential of a and 4b is +7■, and the bulk channel potential of the overflow barrier region is +6■
It is. and N〒overflow drain area 1 is +7
From ■ to Am9■.

What can be seen from the above explanation is that the potential change in the aperture area is 1■
and the potential difference between the opening region and the N1 overflow drain region is +3V or less. Therefore, punch-through between the two is less likely to occur if the channel length of the overflow barrier region is narrowed. As a result, the overflow drain structure can be made smaller and the photosensitivity can be improved.

During the signal charge accumulation period, the signal charge can also be accumulated in the aperture region, so the dynamic range is improved, and the electric field strength on the CCD channel surface at that time is small.
The generation of thermal noise charges is small.

Note that the above electric field strength can be alleviated by implanting boron ions into the surface of the CCD channel 5.6. In addition, in FIG. 1, an overflow drain structure can be installed on the opening area 4a side in the overflow drain arrangement. Furthermore, the area ratio between the opening regions 4a and 4b of each pixel and the channel well region 5 may not be constant, and the opening region area of each pixel may not be equal. That is, it can be changed to control the spectral sensitivity of each pixel. i friend, +a, +b, L
&7￥,, 7. 'r-1eg' 9 pots and J yellow d notebook (・se) immersion is good.

Note that the A register in Figure 2 can be used not only for the two-phase clock transfer method, but also for the IE/B transfer method, four-phase clock transfer method, or 2E.
It can be transferred using the /B transfer method.

However, in the four-phase clock transfer method, one potential well region 5 and one potential barrier region 6 that are adjacent to each other are naturally placed under different transfer electrodes. Further, in the 2E/B transfer method, one potential well region 5 and one potential barrier region 6 adjacent to each other can have the same channel impurity concentration, and may be placed under the same transfer electrode. Naturally, in this case, an interlaced output format is adopted. Of course, when using the 2E/B transfer method where the transfer electrodes on regions 5 and 6 receive different clock voltages, a non-incremental output format is used.

FIG. 5 is a plan view showing a modified embodiment of the A register of the FT sensor of FIG. FIG. 5 is basically the same as FIG. 1. ,
However, the transfer electrodes for one pixel are two layers of transfer electrodes 9b and 9.
c connected above the channel stop area 3. Either of 9b and 90 may be the lower transfer electrode layer.

The advantage of FIG. 5 is that necessary barrier forming ions can be implanted into either channel region 6 (5) using either transfer electrode layer 9c (or 9b) as a mask. Furthermore,
The odd (even) numbered transfer electrodes 9C can be set thin and the even (odd) numbered transfer electrodes 9b can be set thick, and the blue sensitivity can be changed. The A register in Figure 5 is also two-phase, IE/r(,2rc
/ Can be driven using the 13 transfer method.

The overflow drain line 7 can also be manufactured by the same process as 9C.

Note that in a variant embodiment of the invention, the N+ overflow drain region l can be formed by phosphorus diffusion from the phosphorus-doped polysilicon line 7.

[Brief explanation of the drawing]

FIG. 1 is a plan view of one embodiment of the F'r sensor of the present invention. FIG. 2 is a Δ-A° cross-sectional view of FIG. FIG. 3 is a channel potential diagram of FIG. FIG. 4 is a sectional view of layer B-3 in FIG. FIG. 5 is a plan view showing a modified embodiment of the FT sensor of the present invention.

Claims (4)

[Claims] (1) It has an A register that also serves as a pixel column, and a vertical or horizontal overflow drain structure that determines the maximum amount of charge of the A register, and the overflow drain structure that substantially determines the maximum amount of charge of the A register. In a frame transfer CCD solid-state imaging device, which includes an overflow barrier region for determining the overflow barrier region and an overflow drain region for receiving excess signal charges from the overflow barrier region, some or all of the pixels in the above pixel column are A registers of the CCD. A frame transfer CCD comprising a channel region and an aperture region disposed adjacent thereto, wherein the potential of the overflow barrier region is set to be shallower than the potential of the aperture region during a signal charge accumulation period.
Solid-state image sensor. (2) The frame transfer CCD solid-state imaging device according to item 1, further comprising a horizontal overflow barrier region connecting the opening region and the horizontal overflow drain region. (3) Frame transfer CCD solid-state imaging according to item 1, comprising a horizontal overflow drain region and a horizontal overflow barrier region, and wherein the horizontal overflow barrier region is manufactured in the same manufacturing process as the opening region. element. (4) The frame transfer CC according to item 1, wherein the A register is driven by an IE/B transfer method.
D solid-state image sensor.