JPS6349383B2 - - Google Patents
Info
- Publication number
- JPS6349383B2 JPS6349383B2 JP58110214A JP11021483A JPS6349383B2 JP S6349383 B2 JPS6349383 B2 JP S6349383B2 JP 58110214 A JP58110214 A JP 58110214A JP 11021483 A JP11021483 A JP 11021483A JP S6349383 B2 JPS6349383 B2 JP S6349383B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- lead
- semiconductor package
- oxide film
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000007747 plating Methods 0.000 claims description 33
- 239000004065 semiconductor Substances 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 238000003672 processing method Methods 0.000 claims description 7
- 238000010306 acid treatment Methods 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 10
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 229910015365 Au—Si Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 229910000464 lead oxide Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- YEXPOXQUZXUXJW-UHFFFAOYSA-N oxolead Chemical compound [Pb]=O YEXPOXQUZXUXJW-UHFFFAOYSA-N 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Description
【発明の詳細な説明】
（技術分野）
この発明は、パツケージ、リード酸化皮膜の除
去を容易に行なう半導体パツケージのリード処理
方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a semiconductor package lead processing method that facilitates the removal of package and lead oxide films.
（従来技術）
第１図は従来の半導体パツケージのリードの断
面図である。この第１図における１はリード、４
はAu−Siダイボンド部、５はキヤツプであり、
従来のリード１はリード１にNiメツキ２を行い、
その表面にAuメツキ３を行つた構成でリードメ
ツキを行つていた。(Prior Art) FIG. 1 is a sectional view of a lead of a conventional semiconductor package. In this figure 1, 1 is lead, 4
is the Au-Si die bonding part, 5 is the cap,
For conventional lead 1, Ni plating 2 is applied to lead 1.
Lead plating was performed using a configuration in which Au plating 3 was applied to the surface.
原価低減などの目的でAuメツキ３の削除を行
ない、Niメツキ２の状態で半導体装置の組立を
行うと、Au−Siダイボンド４、キヤツプ５の溶
接または樹脂シールなどの工程で高温で処理され
るため、Niメツキ２の表面に強固な酸化皮膜を
生成するために半導体装置組立後、Niメツキ２
をたとえば塩酸、硫酸などによりボイルまたはデ
イツプなどの酸処理によつて酸化皮膜の除去を行
い、ハンダデイツプ（DiP）またはハンダメツキ
などのハンダ処理をしていたが、Niメツキの酸
化皮膜は酸処理によつて除去しにくいという欠点
があつた。 If Au plating 3 is removed for the purpose of cost reduction, etc., and a semiconductor device is assembled with Ni plating 2, the Au-Si die bond 4 and cap 5 will be processed at high temperatures during welding or resin sealing processes. Therefore, in order to generate a strong oxide film on the surface of Ni plating 2, after assembling the semiconductor device, Ni plating 2 is applied.
For example, the oxide film was removed by acid treatment such as boiling or dip using hydrochloric acid or sulfuric acid, and solder treatment was performed using solder dip (DiP) or solder plating, but the oxide film on Ni plating was removed by acid treatment. The drawback was that it was sticky and difficult to remove.
（発明の目的）
この発明は、上記従来の欠点を除去するために
なされたもので、Auメツキを削除したリードの
ハンダデイツプ、ハンダメツキ処理が容易に行え
る半導体パツケージのリード処理方法を提供する
ことを目的とする。(Purpose of the Invention) This invention was made to eliminate the above-mentioned conventional drawbacks, and an object of the present invention is to provide a lead processing method for a semiconductor package that can easily perform solder dip and solder plating processing of leads with Au plating removed. shall be.
（発明の構成）
この発明の半導体パツケージのリード処理方法
は、半導体パツケージのリードにNiメツキをし
てその表面に酸化しても酸処理によつて酸化被膜
が容易に除去できる金属をメツキし、熱処理工程
後メツキ金属を除去してNiメツキ表面にハンダ
処理するようにしたものである。(Structure of the Invention) A lead processing method for a semiconductor package according to the present invention includes plating the leads of a semiconductor package with Ni and plating the surface with a metal whose oxide film can be easily removed by acid treatment even if the surface is oxidized. After the heat treatment process, the plating metal is removed and the Ni plating surface is soldered.
（実施例）
以下、この発明の半導体パツケージのリード処
理方法の実施例について図面に基づき説明する。
第２図はその一実施例に適用される半導体パツケ
ージのリードの断面図であり、第２図において、
第１図と同一部分には同一符号を付してその説明
を省略し、第１図とは異なる部分を重点的に述べ
る。(Example) Hereinafter, an example of the semiconductor package lead processing method of the present invention will be described based on the drawings.
FIG. 2 is a cross-sectional view of a lead of a semiconductor package applied to one embodiment, and in FIG.
Components that are the same as those in FIG. 1 are given the same reference numerals, and their explanations will be omitted, and the portions that are different from FIG. 1 will be mainly described.
この第２図を第１図と比較しても明らかなよう
に、第２図では、符号１１〜３１で示す部分が第
１図とは異なり、この発明の特徴をなす部分であ
る。すなわち、１１はリード、２１はNiメツキ、
３１は酸化しても容易に除去できるメツキ金属、
たとえば、銅、錫、鉛、半田などが用られる。
Niメツキ２１の上に酸化しても酸化皮膜の除去
しやすいメツキ金属３１のメツキでカバーして、
Niメツキ２１の酸化を防止し、かつ酸化膜除去
処理を容易にしている。 As is clear from comparing FIG. 2 with FIG. 1, in FIG. 2, the parts indicated by reference numerals 11 to 31 are different from those in FIG. 1, and are the parts that characterize the present invention. In other words, 11 is lead, 21 is Nimetsuki,
31 is a plated metal that can be easily removed even when oxidized.
For example, copper, tin, lead, solder, etc. are used.
Cover the Ni plating 21 with plating of plating metal 31, which makes it easy to remove the oxide film even if it oxidizes,
This prevents oxidation of the Ni plating 21 and facilitates oxide film removal processing.
たとえばカバー用のメツキ金属３１に銅メツキ
を使用する。そしてシールなどの工程で高温処理
されると、表面に酸化膜ができる。この酸化膜は
たとえば塩酸、酢酸などにデイツプすることによ
り、容易に落ちる。そしてメツキ金属３１を除去
して、Niメツキ２１表面を露出して半田デイツ
プなどを行うと、ハンダデイツプのぬれ性が向上
する。 For example, copper plating is used for the plating metal 31 for the cover. When the material is subjected to high-temperature processing in processes such as sealing, an oxide film forms on the surface. This oxide film can be easily removed by dipping it in, for example, hydrochloric acid or acetic acid. Then, when the plating metal 31 is removed and the surface of the Ni plating 21 is exposed and a solder dip is performed, the wettability of the solder dip is improved.
（発明の効果）
以上述べたごとく、この発明の半導体パツケー
ジのリード処理方法によれば、半導体パツケージ
のリードの表面にNiメツキおよび酸化処理で酸
化皮膜が容易に処理できるメツキ金属でメツキ
し、熱処理工程後このメツキ金属を除去してNi
メツキの表面を露出させてハンダ処理を行うよう
にしたので、Auメツキを削除した半導体パツケ
ージのリードのハンダデイツプ、ハンダメツキ処
理が容易になり、したがつてAuメツキを行なう
必要がなくなり、コストの低減が可能となるもの
である。(Effects of the Invention) As described above, according to the semiconductor package lead processing method of the present invention, the surface of the semiconductor package lead is plated with Ni plating and a plating metal that can easily form an oxide film by oxidation treatment, and then heat-treated. After the process, this plated metal is removed and Ni
Since the surface of the plating is exposed and soldering is performed, the solder dip and solder plating of the leads of the semiconductor package from which the Au plating has been removed is made easier.Therefore, there is no need to perform Au plating, which reduces costs. It is possible.
第１図は従来の半導体パツケージのリードの断
面図、第２図はこの発明の半導体パツケージのリ
ード処理方法に適用された半導体パツケージのリ
ードの断面図である。
４……ダイボンド部、５……キヤツプ、１１…
…リード、２１……Niメツキ、３１……酸化し
ても容易に除去できるメツキ金属。
FIG. 1 is a sectional view of a lead of a conventional semiconductor package, and FIG. 2 is a sectional view of a lead of a semiconductor package applied to the semiconductor package lead processing method of the present invention. 4...Die bond part, 5...Cap, 11...
...Lead, 21...Ni plating, 31...Plated metal that can be easily removed even if oxidized.
Claims (1)
した表面に、酸化しても酸処理によつて酸化皮膜
が容易に除去できる金属によるメツキ金属でメツ
キする工程と、 熱処理工程後、上記メツキ金属を除去して、上
記Niメツキ表面にハンダ処理する工程とを含む
ことを特徴とする半導体パツケージのリード処理
方法。[Scope of Claims] 1. A step of plating the Ni-plated surface of the leads of a semiconductor package with a metal whose oxide film can be easily removed by acid treatment even if oxidized, and after the heat treatment step, A semiconductor package lead processing method comprising the steps of removing the plating metal and soldering the Ni plating surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58110214A JPS603144A (en) | 1983-06-21 | 1983-06-21 | Lead processing method of semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58110214A JPS603144A (en) | 1983-06-21 | 1983-06-21 | Lead processing method of semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS603144A JPS603144A (en) | 1985-01-09 |
| JPS6349383B2 true JPS6349383B2 (en) | 1988-10-04 |
Family
ID=14529954
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58110214A Granted JPS603144A (en) | 1983-06-21 | 1983-06-21 | Lead processing method of semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS603144A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5719540A (en) * | 1980-07-10 | 1982-02-01 | Toshiba Corp | Relative humidity detecting method for air conditioner |
| JP6481895B2 (en) * | 2015-12-16 | 2019-03-13 | 大口マテリアル株式会社 | Lead frame for semiconductor device and manufacturing method thereof |
| JP6971400B2 (en) * | 2018-06-29 | 2021-11-24 | 日立ジョンソンコントロールズ空調株式会社 | Air conditioning system, air conditioning method, and program |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57164552A (en) * | 1981-04-01 | 1982-10-09 | Hitachi Cable Ltd | Lead-frame for semiconductor device |
| JPS5875861A (en) * | 1981-10-30 | 1983-05-07 | Fuji Denka:Kk | Lead wire for circuit element hermetically sealing package and manufacture thereof |
| JPS59161850A (en) * | 1983-03-07 | 1984-09-12 | Hitachi Ltd | Resin sealed type semiconductor device and lead frame used therefor |
-
1983
- 1983-06-21 JP JP58110214A patent/JPS603144A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57164552A (en) * | 1981-04-01 | 1982-10-09 | Hitachi Cable Ltd | Lead-frame for semiconductor device |
| JPS5875861A (en) * | 1981-10-30 | 1983-05-07 | Fuji Denka:Kk | Lead wire for circuit element hermetically sealing package and manufacture thereof |
| JPS59161850A (en) * | 1983-03-07 | 1984-09-12 | Hitachi Ltd | Resin sealed type semiconductor device and lead frame used therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS603144A (en) | 1985-01-09 |
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