JPS634208B2 - - Google Patents

Info

Publication number
JPS634208B2
JPS634208B2 JP56147210A JP14721081A JPS634208B2 JP S634208 B2 JPS634208 B2 JP S634208B2 JP 56147210 A JP56147210 A JP 56147210A JP 14721081 A JP14721081 A JP 14721081A JP S634208 B2 JPS634208 B2 JP S634208B2
Authority
JP
Japan
Prior art keywords
instruction
buffer
operand
memory access
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56147210A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5848146A (ja
Inventor
Haruo Tateno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP56147210A priority Critical patent/JPS5848146A/ja
Priority to US06/415,438 priority patent/US4561052A/en
Publication of JPS5848146A publication Critical patent/JPS5848146A/ja
Publication of JPS634208B2 publication Critical patent/JPS634208B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
JP56147210A 1981-09-18 1981-09-18 命令先取り方式 Granted JPS5848146A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP56147210A JPS5848146A (ja) 1981-09-18 1981-09-18 命令先取り方式
US06/415,438 US4561052A (en) 1981-09-18 1982-09-07 Instruction prefetch system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56147210A JPS5848146A (ja) 1981-09-18 1981-09-18 命令先取り方式

Publications (2)

Publication Number Publication Date
JPS5848146A JPS5848146A (ja) 1983-03-22
JPS634208B2 true JPS634208B2 (https=) 1988-01-28

Family

ID=15425050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56147210A Granted JPS5848146A (ja) 1981-09-18 1981-09-18 命令先取り方式

Country Status (2)

Country Link
US (1) US4561052A (https=)
JP (1) JPS5848146A (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4707784A (en) * 1983-02-28 1987-11-17 Honeywell Bull Inc. Prioritized secondary use of a cache with simultaneous access
US4729093A (en) * 1984-09-26 1988-03-01 Motorola, Inc. Microcomputer which prioritizes instruction prefetch requests and data operand requests
US4695943A (en) * 1984-09-27 1987-09-22 Honeywell Information Systems Inc. Multiprocessor shared pipeline cache memory with split cycle and concurrent utilization
US4761731A (en) * 1985-08-14 1988-08-02 Control Data Corporation Look-ahead instruction fetch control for a cache memory
US4773041A (en) * 1986-06-02 1988-09-20 Unisys Corporation System for executing a sequence of operation codes with some codes being executed out of order in a pipeline parallel processor
JPS6398737A (ja) * 1986-10-15 1988-04-30 Mitsubishi Electric Corp デ−タ処理装置
US4797817A (en) * 1986-12-10 1989-01-10 Ncr Corporation Single cycle store operations in a virtual memory
JP2583525B2 (ja) * 1987-09-30 1997-02-19 健 坂村 データ処理装置
US4943908A (en) * 1987-12-02 1990-07-24 International Business Machines Corporation Multiple branch analyzer for prefetching cache lines
JPH01205228A (ja) * 1988-02-10 1989-08-17 Hitachi Ltd 命令バツフアシステム
JPH0719222B2 (ja) * 1989-03-30 1995-03-06 日本電気株式会社 ストアバッフア
US5367657A (en) * 1992-10-01 1994-11-22 Intel Corporation Method and apparatus for efficient read prefetching of instruction code data in computer memory subsystems
US7085915B1 (en) * 2000-02-29 2006-08-01 International Business Machines Corporation Programmable prefetching of instructions for a processor executing a non-procedural program

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE26087E (en) * 1959-12-30 1966-09-20 Multi-computer system including multiplexed memories. lookahead, and address interleaving features
US3840861A (en) * 1972-10-30 1974-10-08 Amdahl Corp Data processing system having an instruction pipeline for concurrently processing a plurality of instructions
US3881173A (en) * 1973-05-14 1975-04-29 Amdahl Corp Condition code determination and data processing
CA1059639A (en) * 1975-03-26 1979-07-31 Garvin W. Patterson Instruction look ahead having prefetch concurrency and pipe line features
GB1506972A (en) * 1976-02-06 1978-04-12 Int Computers Ltd Data processing systems
US4062058A (en) * 1976-02-13 1977-12-06 The United States Of America As Represented By The Secretary Of The Navy Next address subprocessor
US4156925A (en) * 1976-04-30 1979-05-29 International Business Machines Corporation Overlapped and interleaved control store with address modifiers
GB1527289A (en) * 1976-08-17 1978-10-04 Int Computers Ltd Data processing systems
US4200927A (en) * 1978-01-03 1980-04-29 International Business Machines Corporation Multi-instruction stream branch processing mechanism
US4439828A (en) * 1981-07-27 1984-03-27 International Business Machines Corp. Instruction substitution mechanism in an instruction handling unit of a data processing system

Also Published As

Publication number Publication date
US4561052A (en) 1985-12-24
JPS5848146A (ja) 1983-03-22

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