JPS6341020A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the sensitivity of detection for an exposure machine, and to obtain a semiconductor device having high precision by removing a metallic layer on a positioning mark at the time of automating the positioning of a mask pattern as one of the working processes of the metallic layer for a wiring. CONSTITUTION:Positioning marks 2 consisting of a polycrystalline silicon oxide film are applied onto a semiconductor substrate 1 at the same time as the formation of a gate electrode, an insulating film 3 is applied, a metallic layer 4 for a wiring is deposited onto the insulating film 3, and a first photo-resist film 5 is applied onto the metallic layer 4. The first photo-resist film 5 is exposed and developed so as to be selectively removed, the metallic layer 4 exposed is taken off through etching, using the film 5 as a mask, the insulating film 3 is gotten rid of to expose the positioning marks 2, and the remainder of the first photo-resist film 5 is taken away. A second photo-resist film is applied onto the whole surface, and the positioning marks are employed for positioning an exposure region on the semiconductor substrate and the exposure region is exposed and developed, thus shaping a mask pattern for forming the wiring on the metallic layer 4. The insulating film 3 on the positioning marks 2 is removed, thus improving the precision of positioning.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device that utilizes alignment marks provided on a substrate to align exposure areas.

[Conventional technology]

Conventionally, in the manufacture of semiconductor devices, when forming a mask pattern for forming wiring on a metal layer on a semiconductor substrate, alignment marks are provided on the semiconductor substrate in advance, and alignment marks are used to align the exposed area with respect to the metal layer. It was used as a landmark.

To describe this method more specifically, first an insulating film is deposited on a semiconductor substrate with alignment marks made of polycrystalline silicon oxide film, then a photoresist film is deposited on the metal layer, and then a photoresist film is deposited on the metal layer. An alignment mark is found on the metal layer, automatic exposure is performed using the alignment mark as a guide for the exposure area, and a photoresist mask having a predetermined pattern is formed on the surface of the metal layer by development. Thereafter, normal operations are performed to manufacture a semiconductor device. Note that the alignment mark is provided at the same time as the gate I-electrode (not shown) is formed.

[Problem that the invention seeks to solve]

According to such a conventional manufacturing method, since alignment is performed with the alignment mark covered with a metal film for wiring, the intensity with which the alignment mark is detected is reduced, resulting in a decrease in alignment accuracy. In particular, in semiconductor devices that are miniaturized and have a narrow alignment width, this decrease in precision becomes a major problem in manufacturing.

An object of the present invention is to provide a method for manufacturing a semiconductor device that improves the detection accuracy of alignment marks.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of forming an alignment mark on a semiconductor substrate, depositing an insulating film on the semiconductor substrate including the alignment mark, and depositing metal for wiring on the insulating film. selectively removing the metal layer on the alignment mark by a selective etching method using a first photoresist film; and removing the alignment mark and the wiring metal layer. an exposure and development step of depositing a second photoresist film on the entire surface of the photoresist film, exposing and developing the alignment mark using the alignment marks to align the exposure area, and forming a wiring pattern of the second photoresist film. Consists of.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1 (a), an alignment mark 2 made of a polycrystalline silicon oxide film is deposited on a semiconductor substrate 1 at the same time as a gate electrode is formed.An insulating film 3 is deposited on the semiconductor substrate. A metal layer 4 for wiring is deposited on the insulating layer 3, and a first photoresist film 5 is deposited on the metal layer 4.

Next, as shown in FIG. 1(b), the first photoresist film 5 on the alignment mark 2 is exposed and developed so as to selectively remove it. Using this first photoresist film 5 as a mask, the exposed metal layer 4 is removed by etching.

Next, as shown in FIG. 1(c), the insulating film 3 above the alignment mark 2 is removed to expose the alignment mark 2, and then the remainder of the first photoresist film 5 is removed. Removing the insulating film 3 on the alignment mark 2 has the effect of improving alignment accuracy.

Next, as shown in FIG. 1(d), a second photoresist film is deposited on the entire surface including the insulating film 3 and the metal layer 4 for wiring. Next, the alignment mark is used to align the exposure area on the semiconductor substrate, and exposure and development are performed to form a mask pattern for forming wiring on the metal layer 4.

In this way, by etching away the metal layer 4 on the alignment mark 2 using a normal photoresist technique, the conventional problem of misalignment can be solved. Note that when the alignment mark 2 is on the semiconductor substrate 1, it is sufficient to remove the insulating film 3 under the metal layer 4 as described above, and when the alignment mark 2 is on the insulating film 3, it is not removed. Leave it as is.

〔Effect of the invention〕

As explained above, the present invention removes the metal layer on the alignment mark and removes the metal layer on the alignment mark when automatically aligning the mask pattern, which is one of the processing steps l of the metal layer for wiring. By improving the degree of arbitrariness of detection, there is an effect that a semiconductor device with higher precision can be manufactured.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Alignment mark, 3... Insulating film, 4... Metal layer, 5
...First photoresist film, 6... Second photoresist film.

Claims (1)

[Claims] forming an alignment mark on a semiconductor substrate; depositing an insulating film on the semiconductor substrate including the alignment mark; depositing a metal layer for wiring on the insulating film;
selectively removing the metal layer on the alignment mark by a selective etching method using a first photoresist film, and depositing a second photoresist on the entire surface including the alignment mark and the wiring metal layer. an exposure and development step of depositing a film, exposing and developing using the alignment mark for alignment of the exposure area to form a wiring pattern of the second photoresist film. manufacturing method.