JPS59231815A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a pin-hole on a mask from being transferred onto a semiconductor substrate when a positioning mark is formed on the semiconductor substrate by patterning with two overlapped masks. CONSTITUTION:A buried layer 12 is formed in an Si substrate 11 and and SiO2 film 13 is formed on the surface of the substrate 11. In order to form a positioning mark by which a displacement after an epitaxial growth is detected on the substrate, an exposure is performed with two overlapped see-through masks 21 and 22. A center positioning window 21-1 is formed at the center of the mask 21 and positioning windows 21-2 are formed at the left and right prescribed parts of the mask 21 with a high accuracy. Positioning windows 22-1 are formed on the mask 22 at the positions corresponding to the positioning windows 21-2. The size of the windows 22-1 has allowance of ten to several dozen mm. over the size of the windows 21-2. If the exposure is performed with the overlapped masks like this, a probability of the coincidence of pin-holes is very little. Therefore, an unnecessary SiO2 film produced by a transfer of a pin-hole at the time of photoetching is not formed and the SiO2 film as a prescribed positioning mark 14 is selectively formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming alignment marks before epitaxial growth.

(b) Background of the Technology When forming a semiconductor device such as a bipolar RAM, impurity atoms are selectively introduced onto a semiconductor substrate using a predetermined insulating mask pattern to form a low concentration region of co-V current. After forming a buried layer for the semiconductor substrate, an epitaxial layer is formed on the semiconductor substrate at the end of the process, and a positional shift (ebi shift) occurs during the growth process of this epitaxial layer. An alignment mark is required to detect this positional shift. Therefore, a predetermined pattern 5OLO2 film is formed on a semiconductor substrate as an alignment mark for detecting positional deviation after epitaxial growth on a semiconductor substrate on which a semiconductor device such as the one described above is formed.

(C) Prior Art and Problems A conventional method of manufacturing such a semiconductor device will be explained with reference to FIGS. 1 to 5.

First, as shown in FIG. 1, a Si,O2 film 2 is formed on the entire surface of a semiconductor substrate l, for example, a Si substrate, by thermal oxidation of the substrate.

Next, as shown in FIG. 2, after selectively forming a photoresin film (not shown) in a predetermined pattern on the substrate, using the resist film as a mask, 5102 The film 2 is selectively etched into a predetermined pattern, and the selectively etched film 51 is formed.
Using the 02 film 2 as a mask, ions of, for example, arsenic (As) atoms are implanted as indicated by arrows.

Thereafter, as shown in FIG. 3, the substrate is heated to form a buried layer 3 by diffusing the implanted As atoms to a predetermined size. In the figure, 4 is the SiO2 film formed during this heat treatment.

Next, as shown in FIG. 4, an iron oxide mask (SeethrOughmask) provided with alignment marks is placed on the oxide film in a predetermined area on the substrate where alignment marks are to be formed.
) to form a photoresinut film (not shown),
The 5i02 film is selectively etched with an aqueous solution such as I-TF to form alignment marks 5 of the oxide film, and the V dis) M is removed.

However, this Ji-suru mask (See tbrou
If there is a pinhole in the 8102 film 5 for the alignment mark, an unnecessary 5in2 film 6 will be transferred onto the S1 substrate as shown in the figure.

As a result, as shown in the next step in FIG.
) AV upper D is 5j-0, the epitaxial layer is not formed as the film is used as a mask, and the alignment mark 5 is used to judge the positional deviation of the epitaxial layer with respect to the substrate, but the epitaxial layer is not transferred due to the pinhole mentioned above. unnecessary oxide film 6
The epitaxial layer 7 does not grow on top of the epitaxial layer 7, causing defects in the epitaxial layer 7 for forming the semiconductor element. Especially when creating highly integrated devices, defects in the epitaxial layer due to this pinhole μ cause defects in the epitaxial layer 7 for forming the semiconductor element. quality decline,
Furthermore, there was a problem that the yield was reduced.

(ill) OBJECTS OF THE INVENTION The object of the present invention has been made in view of the above problems, and is to provide a semiconductor device capable of improving the quality of semiconductor devices and improving the yield by preventing pin holes 7 of the see-through mask from being transferred to the semiconductor substrate. The purpose is to provide a manufacturing method.

(e) Structure of the Invention In order to achieve the object, the present invention provides a first mask provided with a pattern of highly accurate alignment marks, and a first mask provided with a pattern of highly accurate alignment marks when forming alignment marks on a semiconductor substrate. The method is characterized in that it includes a step of patterning the alignment mark by overlapping a second mask provided with a pattern corresponding to the mark and larger than the alignment mark.

(f) Examples of the invention Embodiments of the present invention will be described below with reference to the drawings.

6 to 8 are sectional views of main parts for explaining an embodiment of the present invention, and FIG. 9 is a first mask provided with highly accurate alignment marks used in an embodiment of the present invention. FIG. 1O is a plan view of a second mask that corresponds to the high-precision alignment mark in FIG. 9 and has a larger pattern than the alignment mark, and FIG. 11 is a plan view of the first mask and FIG. 2 is a plan view of the main parts of two masks superimposed on each other.

First, as shown in FIGS. 1 and 2 described above in the conventional example, Si
A 5in2 film 2 is formed on the substrate 1 by thermal oxidation of the substrate.
After forming the 5102 film into a predetermined pattern, A and s were formed using the patterned 5j-02 film as a mask.
The hot well method is the same as the conventional method in which atoms are ion-implanted and the substrate is heated to form a buried layer by diffusing the implanted As atoms to a predetermined size. In this way, the buried layer 12 and the substrate surface 5102 film 18 are formed on the Si substrate 11, as shown in FIG. Next, the substrate 11
FIG. 9 shows the process of forming alignment marks for detecting positional deviations after epitaxial growth.

Then, the see-through mask shown in FIG. 1O is superimposed on the resist film (M not shown) coated on the substrate to perform alignment mark transfer exposure, and the resist film is used as a mask to selectively etch the resist film. If we remove , we get Figure 7. The sheath flake mask 21, which is entirely covered with iron oxide, shown in FIG.
Positioning mark windows 21-2 are formed with high precision in predetermined areas on the left and right sides of 1-1 by removing iron oxide. Similarly, the see-through mask 22 in FIG. 1O is formed with a corresponding window 22-1 having a size that is 10 to several IQ*m larger than the alignment mark window 21-2 and iron oxide removed. It is desirable that the dimensions of this window 22-1 have versatility.

Mask 21 with such a structure. When overlapping exposure is performed as shown in FIG. 11 using 22 and 22, the probability that the pinholes will overlap is very small, so as shown in FIG. No SiO2 film is formed and predetermined alignment marks 14. That is, the 5j-02 film of the alignment mark 14 onto which the alignment mark window 21-2 has been transferred is selectively formed by photoresist technology.

Next, as shown in FIG. 8, epitaxial/
When the L/layer 15 is grown, a defect-free epitaxial (V) layer 15 is formed, and it becomes possible to form a semiconductor element on the epitaxial layer using normal semiconductor technology.

(2) As described in detail, according to an embodiment of the present invention, when forming alignment marks before epitaxia IV growth, the first mask and the second mask described above are overlapped to form a pattern. By coating, it becomes possible to prevent pinholes on the mask from being transferred onto the semiconductor substrate, which is effective in improving quality and yield.

[Brief explanation of the drawing]

1 to 5 are sectional views of main parts for explaining the conventional method, FIGS. 6 to 8 are sectional views of main parts for explaining an embodiment of the present invention, and FIG. 9 is a sectional view of main parts for explaining an embodiment of the present invention. FIG. 10, a plan view of the first mask provided with highly accurate alignment marks used in one embodiment, corresponds to the highly accurate alignment marks in FIG. FIG. 11, which is a plan view of the second mask provided, is a plan view of the main part of the first mask and the second mask superposed on each other. In the figure, 1 and 11 are semiconductor substrates, 3 and 12 are buried layers, and 5 and 14
2 corresponds to the alignment mark on the semiconductor substrate, 7 and 15 are epitaxial layers, 21 is a first mask provided with a high-precision alignment mark, 22 corresponds to the high-precision alignment mark 21, and the alignment mark A second mask with a larger pattern is shown. Agent Patent Attorney Hiroshi Matsuoka Department Figure 1 Figure 2 Figure 6 Figure 13 1 Figure 7 Figure 8 4 1]-1 Ichi 11 Figure

Claims (1)

[Claims] When forming alignment marks on a semiconductor substrate, a first mask is provided with a pattern of highly accurate alignment marks, and a second mask is provided with a pattern that corresponds to the highly accurate alignment marks and is larger than the alignment marks. 1. A method for manufacturing a semiconductor device, comprising the step of patterning alignment marks by overlapping two masks.