JPS6338195U - - Google Patents

Info

Publication number
JPS6338195U
JPS6338195U JP13030286U JP13030286U JPS6338195U JP S6338195 U JPS6338195 U JP S6338195U JP 13030286 U JP13030286 U JP 13030286U JP 13030286 U JP13030286 U JP 13030286U JP S6338195 U JPS6338195 U JP S6338195U
Authority
JP
Japan
Prior art keywords
timing
regular
write address
performance pattern
adjustment time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13030286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13030286U priority Critical patent/JPS6338195U/ja
Publication of JPS6338195U publication Critical patent/JPS6338195U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例の全体構成図、第
2図は実施例の要部の機能ブロツク図、第3図は
実施例の動作のフローチヤート、第4図はパター
ン入力例を示す図である。 2―2……タイミング調整用カウンタ、2―3
……アドレスカウンタ、2―4……コンパレータ
、2―5……マージン調整、2―6……プラスワ
ン、2―7……パターン読出し、2―8……キー
スキヤン、41……パターン作成メモリ、42…
…サポートパターンメモリ。
Fig. 1 is an overall configuration diagram of an embodiment of this invention, Fig. 2 is a functional block diagram of the main parts of the embodiment, Fig. 3 is a flowchart of the operation of the embodiment, and Fig. 4 shows an example of pattern input. It is a diagram. 2-2...Counter for timing adjustment, 2-3
... Address counter, 2-4 ... Comparator, 2-5 ... Margin adjustment, 2-6 ... Plus one, 2-7 ... Pattern reading, 2-8 ... Key scan, 41 ... Pattern creation memory, 42...
...Support pattern memory.

Claims (1)

【実用新案登録請求の範囲】 所定のタイミングで入力された操作情報の記憶
タイミングとして、クロツクの規定する正規のタ
イミングと同期して歩進される書込アドレスを割
り当てることによつて演奏パターンを書き込むリ
アルタイムの演奏パターン書込手段を備える電子
楽器において、 上記演奏パターン書込手段が、 上記の正規の各タイミングの前後に調整時間帯
を設ける調整時間帯付与手段と、 操作入力時に、上記調整時間帯付与手段を使用
して、操作入力のタイミングが属する調整時間帯
をもつ正規のタイミングを特定し、この特定した
正規のタイミングに対応するアドレスを上記書込
アドレスとする書込アドレス決定手段と、 を有することを特徴とする電子楽器。
[Claim for Utility Model Registration] A performance pattern is written by assigning a write address that is incremented in synchronization with the regular timing specified by a clock as the storage timing of operation information input at a predetermined timing. In an electronic musical instrument equipped with a real-time performance pattern writing means, the performance pattern writing means includes an adjustment time period providing means for providing an adjustment time period before and after each of the regular timings; Write address determining means that uses the assigning means to specify a regular timing having an adjustment time zone to which the timing of the operation input belongs, and sets the address corresponding to the specified regular timing as the write address; An electronic musical instrument characterized by having:
JP13030286U 1986-08-28 1986-08-28 Pending JPS6338195U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13030286U JPS6338195U (en) 1986-08-28 1986-08-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13030286U JPS6338195U (en) 1986-08-28 1986-08-28

Publications (1)

Publication Number Publication Date
JPS6338195U true JPS6338195U (en) 1988-03-11

Family

ID=31027669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13030286U Pending JPS6338195U (en) 1986-08-28 1986-08-28

Country Status (1)

Country Link
JP (1) JPS6338195U (en)

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