JPH03128861U - - Google Patents
Info
- Publication number
- JPH03128861U JPH03128861U JP3815390U JP3815390U JPH03128861U JP H03128861 U JPH03128861 U JP H03128861U JP 3815390 U JP3815390 U JP 3815390U JP 3815390 U JP3815390 U JP 3815390U JP H03128861 U JPH03128861 U JP H03128861U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- clock signal
- under test
- waveform
- measurement point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims description 6
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Tests Of Electronic Circuits (AREA)
Description
第1図は本考案の波形測定装置の構成ブロツク
図、第2図は本考案の波形測定装置の動作を説明
するためのタイムチヤート、第3図は第1図にお
けるデイレイ回路を抽出して示した構成ブロツク
図、第4図は第3図で示したデイレイ回路の動作
を示すタイミングチヤート、第5図は実際にデイ
レイ値を設定する場合を被測定信号を用いて説明
した説明図、第6図は従来のLSIテスタにおい
て、デジタイザを使用して波形測定を行う場合の
説明図である。
1…トラツク・ホールド回路、2…A/Dコン
バータ、3…メモリ、4…メモリ・コントローラ
、5…デイレイ回路、6…モジユール・コントロ
ーラ、7…比較回路。
Fig. 1 is a block diagram of the configuration of the waveform measuring device of the present invention, Fig. 2 is a time chart for explaining the operation of the waveform measuring device of the present invention, and Fig. 3 shows an extracted delay circuit in Fig. 1. FIG. 4 is a timing chart showing the operation of the delay circuit shown in FIG. 3, FIG. The figure is an explanatory diagram when waveform measurement is performed using a digitizer in a conventional LSI tester. DESCRIPTION OF SYMBOLS 1...Track hold circuit, 2...A/D converter, 3...Memory, 4...Memory controller, 5...Delay circuit, 6...Module controller, 7...Comparison circuit.
Claims (1)
ンプル・クロツク信号に同期して測定する波形測
定装置において、 装置各部の制御を行い、被測定信号の測定デー
タを処理するモジユール・コントローラと、 前記被測定信号を一定電圧値と比較して得た第
1のクロツク信号を、前記モジユール・コントロ
ーラからの信号に基づいて設定された時間遅延す
るデイレイ回路と、 このデイレイ回路によつて、得られた第2のク
ロツク信号によつて、前記被測定信号の特定の測
定ポイントをホールドするトラツク・ホールド回
路と、 このトラツク・ホールド回路でボールドした測
定ポイントの値をデジタル変換するA/Dコンバ
ータと、 このA/Dコンバータで変換されたデータが書
き込まれるメモリと、 前記デイレイ回路によつて得られた第2のクロ
ツク信号によつて、前記メモリにアドレスとライ
トパルスを与えて前記メモリにデータを書き込む
とともに、前記モジユールコントローラの命令に
基づいて、前記メモリからデータを読み出すメモ
リコントローラと、 を有することを特徴とした波形測定装置。[Claim for Utility Model Registration] In a waveform measuring device that measures any measurement point of one waveform of a signal under test in synchronization with a sample clock signal, controlling each part of the device and processing the measurement data of the signal under test. a delay circuit that delays a first clock signal obtained by comparing the signal under test with a constant voltage value by a time set based on a signal from the module controller; A track and hold circuit that holds a specific measurement point of the signal under test using the second clock signal obtained by the clock signal; and a track and hold circuit that digitally converts the value of the measurement point shown in bold. An A/D converter, a memory into which data converted by the A/D converter is written, and a second clock signal obtained by the delay circuit to give an address and a write pulse to the memory. A waveform measurement device comprising: a memory controller that writes data to the memory and reads data from the memory based on instructions from the module controller.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3815390U JPH03128861U (en) | 1990-04-10 | 1990-04-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3815390U JPH03128861U (en) | 1990-04-10 | 1990-04-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03128861U true JPH03128861U (en) | 1991-12-25 |
Family
ID=31545903
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3815390U Pending JPH03128861U (en) | 1990-04-10 | 1990-04-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03128861U (en) |
-
1990
- 1990-04-10 JP JP3815390U patent/JPH03128861U/ja active Pending
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