JPS6336342A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To make it possible to cancel the external input reception prohibition state surely by providing a timer circuit which is started at the time of starting a series of operation and generates an input permission signal after lapse of time longer than that required for execution of the series of operation. CONSTITUTION:When inputting is made to an internal circuit 2 through an input buffer 1 on receiving input from an external input terminal phi, the internal circuit 2 starts a series of operation responding to the external input, and on the other hand, outputs an input reception prohibition signal to the input buffer 1 through a control signal line 10, and outputs a start signal to a timer circuit 200 through a control signal line 40. When power source caused momentary break, the internal circuit 2 maintains the state of reception prohibition. However, execution of a series of operation of an internal circuit group 100 is stopped thereafter, and the semiconductor integrated circuit itself becomes the state of stall. However, when the power source is restored, the timer circuit 200 restarts clocking, and after lapse of a specified time, outputs an instruction to permit input reception through a control signal line 20, and restores the semiconductor integrated circuit is restored to input possible state.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to a novel configuration of a semiconductor integrated circuit having a function of prohibiting reception of human power.

Traditional technique IR? 2. Description of the Related Art Some so-called semiconductor integrated circuits perform an operation in which, while receiving a single external human input to execute a series of operations, other inputs are prohibited until the series of operations is completed.

That is, as shown in FIG. 4, the semiconductor integrated circuit 100 includes a group of internal circuits 2 to n, and a human power buffer 1 that receives and passes input from the outside. When execution of the operation is started, an input prohibition command is output from the internal circuit 2 to the buffer 1, and the buffer 1 no longer accepts input from the outside. And internal circuit 2~
When the series of operations in n is completed and the results of the series of operations are output, the buffer 1 is configured so that it can be manually operated again.

Problems to be Solved by the Invention However, the semiconductor integrated circuit configured as described above has the following problems:
If the internal circuit is executing a series of operations, that is, in a state where input is prohibited, and the completion of the series of operations is prevented due to a momentary power outage or external noise, the state where external input is prohibited cannot be canceled. It's gone. This is because the same internal circuit executes the manual prohibition release operation following the completion of a series of operations, so if the execution of the series of operations in the internal circuit is inhibited, the series of operations performed by external human power will simply be interrupted. Not only is execution hindered, but it becomes impossible to remove the obstacle or perform a new series of actions manually.

Therefore, if a malfunction occurs during the execution of a series of operations that involve prohibition of human input, the malfunction will continue for a very long time, on the order of seconds. It is extremely difficult to lift the prohibition on human intervention from outside for semiconductor integrated circuits that have stopped operating.

If a semiconductor integrated circuit is in such a state, it is necessary to wait for the internal contacts to self-discharge, or to turn the system's power off and on again. could not resume input.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor integrated circuit which has an internal function for reliably canceling the state in which reception of external human power is prohibited.

Means to Solve the Problem In conventional semiconductor integrated circuits, the series of operations to be executed by the internal circuit of the semiconductor integrated circuit by external human power and the human power acceptance permission operation are a sequential series of operations. If the execution of the operation is inhibited, the series of operations performed by the internal circuit will not reach the input acceptance permission operation.

Therefore, we believe that it would be advantageous to provide a means to ensure that the internal circuit of the semiconductor integrated circuit executes the manual acceptance permission operation without interfering with the internal series of operations, and we have conducted various studies. As a result, the present invention was completed.

That is, according to the present invention, a set series of operations is activated by external human power, an operation to prohibit reception of external input is executed simultaneously with the activation of the series of operations, and furthermore, after the series of operations is completed, external input is again performed. In a semiconductor integrated circuit configured to perform an operation that enables human input, the input is activated at the start of the series of operations, and after a time longer than the time required to execute the series of operations has elapsed, input is permitted. The semiconductor integrated circuit described above is provided, characterized in that it includes a timer circuit that generates a signal.

Further, the timer circuit can be easily constructed using well-known techniques such as one using a CR time constant circuit or one using oscillation of a ring oscillator.

EXAMPLES Hereinafter, the present invention will be described in more detail in accordance with Examples, but what is described below is only one example of the present invention, and does not limit the technical scope of the present invention in any way.

FIG. 1 is a block diagram schematically showing the configuration of a semiconductor integrated circuit according to the present invention.

As shown in FIG. 1, the semiconductor integrated circuit according to the present invention is
It includes a buffer 1 that is prohibited from accepting input by a human power acceptance prohibition signal from the control signal lines 10 and 20, and is disabled from accepting human input by an input permission signal from the control signal lines 20 and 30, and internal circuits 2 to n. Internal circuit group 1
00 and a timer circuit 200 activated by a control signal from a control signal line 40.

In this semiconductor integrated circuit, when human power is received from the external input terminal φ and is applied to the internal circuit 2 via the human power buffer 1, the internal circuit 2 starts a series of operations in response to the external human power. Manual buffer 1 via control signal line 10
A human power reception prohibition signal is output to the timer circuit 200 via the control signal line 40, and an activation signal is output to the timer circuit 200.

Further, a series of operations are sequentially executed in a series of internal circuits 2 to n, and a series of operation results are output from internal circuit n, and at the same time, internal circuit n receives input to human buffer 1 via control signal line 30. While outputting a permission signal, a timer control command is output to the internal circuit 2. The internal circuit 2 that has received this timer control command outputs stop and reset commands to the timer circuit.

Therefore, the timer circuit 200 is activated when there is human power in the buffer 1, and is stopped/reset via the inner circuit 2 when a control signal indicating the completion of a series of operations is output from the internal circuit n.

Furthermore, the timer circuit 200 is configured to output an input acceptance permission signal to the buffer 1 and the internal circuit 2 after a predetermined certain period of time has elapsed since the internal circuit 2 manually issued the activation command. has been done. At this time, the time from when the timer circuit 200 is activated until it outputs the human power acceptance permission signal is longer than the time required from when the internal circuit 2 receives external human power until the internal circuit n completes a series of operations. It is set.

Further, when the power supply is momentarily cut off, the inner circuit 2 maintains the acceptance prohibited state, but the execution of a series of operations of the internal circuit group 100 after that time is stopped. As a result, the semiconductor integrated circuit itself becomes non-functional.

Next, the operation of the semiconductor integrated circuit according to the present invention will be described with reference to a time chart assuming that the input buffer 1 is in a state where it can accept external input.

FIG. 2 is a time chart showing the operation of the semiconductor integrated circuit configured as described above when the series of operations is completed without any failure during the series of operations.

When the external human power applied to the input terminal φ changes to activate the internal circuit at time T1, the internal circuit 2 receives the output of the input buffer 1 and outputs an input acceptance prohibition signal to the control signal line 10 at time T2. At the same time, an activation signal for the timer circuit 200 is output to the control signal line 40.

According to these control commands, at time T3, the human power buffer 1 enters a state in which reception of external human power is prohibited, and the timer circuit 200 starts timing. Furthermore, internal circuits 2 to n sequentially and continuously execute a series of operations.

Internal circuit 3 to internal circuit n start up in sequence, and at time T4
The internal circuit n outputs an acceptance permission signal to the signal line 30, and in response to this, the input buffer 1 becomes ready to accept external human power at time T5.

Also, at this time, the internal circuit 2 outputs a stop/reset command to the timer circuit 200 via the signal line 40. Therefore, at this time, the timer circuit 200 is in an initial state and waits for activation.

Next, as an example in which the internal circuit suffers a failure while executing a series of operations, a case will be described in which the power supply of the semiconductor integrated circuit is momentarily cut off while the internal circuit is operating, also with reference to a time chart. FIG. 3 is a time chart showing the operation of the semiconductor integrated circuit when the power supply is momentarily cut off while the internal circuit group is executing a series of operations.

When the external human power at the input terminal φ changes to activate the internal circuit at time T6, the internal circuit 2 that receives the output from the human power buffer 1 outputs an input acceptance prohibition signal to the buffer l via the signal line 10 at time T7. On the other hand, a start command is output to the timer circuit 200 via the signal line 40.

After receiving these control commands, the human power buffer 1 enters a state in which reception of external human power is prohibited at time T8, and the timer circuit 200 is activated.

Here, at time T9 while the inner circuit 3 to the inner circuit n sequentially execute a series of operations, the power of the semiconductor integrated circuit is increased. When the power is momentarily cut off and a series of operations in the internal circuit group 100 after this time are stopped, the manual prohibition by the internal circuit n is canceled.
The signal is not output forever, and the internal circuit 2 continues to maintain the reception prohibited state.

However, when the power is restored, the timer circuit 200 resumes timing and outputs an input acceptance permission command via the control signal line 20 at time T10 when a predetermined time has elapsed.

The input buffer 1 that has received this manual input permission command enters a state in which external manual input can be accepted at time Tll. Also, at the same time,
The inner circuit 2 also outputs a stop and reset command to the timer circuit 200 as it transitions to the external input permission state, and thus, at time T12, the timer circuit 200 also enters the initial state and waits for activation.

In this way, although the series of operations started at time T8 are not completed, the semiconductor integrated circuit returns to a state in which it can be operated manually.

Effects of the Invention As detailed above, the semiconductor integrated circuit according to the present invention includes a timer circuit for returning to an input enabled state, independent of the internal circuit within the circuit. Even if there is a failure in the execution of a series of operations in the internal circuit due to a momentary power interruption or the influence of other noise, the state in which external human power is not accepted is canceled after a predetermined period of time, and the state in which new human power can be accepted is automatically restored. be able to.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a semiconductor integrated circuit according to the present invention, and FIG. 2 is a time chart for explaining the operation of the semiconductor integrated circuit shown in FIG. This shows the operation when no failure occurs during execution. FIG. 3 is also a time chart for explaining the operation of the semiconductor integrated circuit shown in FIG. 1, and shows a series of operation executions. Figure 4 is a block diagram schematically showing the configuration of a conventional semiconductor integrated circuit. . (Main reference numbers) φ...Input terminal, 1...High power buffer, 2~n...Internal circuit, 10~40...Control signal line, 100...Internal circuit group, 200...Timer circuit, 2nd Diagram Timer ``Timer Circuit''Ui Bamboo Period

Claims (1)

[Claims] A set series of operations is activated by an external input, an operation for prohibiting acceptance of external input is executed at the same time as the series of operations is activated, and further, after the series of operations is completed, the external input is not accepted again. In a semiconductor integrated circuit configured to execute an operation to enable acceptance, the input permission signal is activated at the start of the series of operations and after a time longer than the time required to execute the series of operations has elapsed. The above-mentioned semiconductor integrated circuit is characterized by comprising a timer circuit that generates a signal.