JPS6336033U - - Google Patents
Info
- Publication number
- JPS6336033U JPS6336033U JP12711686U JP12711686U JPS6336033U JP S6336033 U JPS6336033 U JP S6336033U JP 12711686 U JP12711686 U JP 12711686U JP 12711686 U JP12711686 U JP 12711686U JP S6336033 U JPS6336033 U JP S6336033U
- Authority
- JP
- Japan
- Prior art keywords
- mark
- alignment
- alignment mark
- dimensions
- marks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 238000000206 photolithography Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
第１図は本考案に係る半導体装置の目合せマー
クの一実施例を示す正面図である。第２図ａ及び
ｂは第１図に示した各マークをそれぞれ独立に示
したものであり、寸法も示している。第３図ａ，
ｂは重ね合せ誤差が発生したときの状態を示す図
である。第４図は、従来の半導体装置の目合せマ
ークを示す正面図である。
１……あらかじめウエハ上にある目合せマーク
、２……フオトリソグラフイによつて作られる目
合せマーク。
FIG. 1 is a front view showing one embodiment of an alignment mark for a semiconductor device according to the present invention. FIGS. 2a and 2b show each mark shown in FIG. 1 independently, and also show their dimensions. Figure 3a,
b is a diagram showing a state when an overlay error occurs. FIG. 4 is a front view showing alignment marks of a conventional semiconductor device. 1... Alignment mark previously placed on the wafer, 2... Alignment mark made by photolithography.
Claims (1)
リソグラフイ工程の重ね合せ誤差を知る目合せマ
ークにおいて、第１方のマークは長方形をＸ，Ｙ
軸それぞれに原点を中心に配置されたものであり
、第２方のマークは形状は前記第１のマークと同
様であるが寸法及び配置をある一定量前記第１の
マークより変化させたことを特徴とする半導体装
置の目合せマーク。 In the alignment mark, which shows the overlay error in the photolithography process by overlapping two marks, the first mark is used to mark a rectangle in the X and Y directions.
The second mark is arranged around the origin on each axis, and the second mark has the same shape as the first mark, but the dimensions and arrangement are changed by a certain amount from the first mark. A distinctive alignment mark for semiconductor devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12711686U JPS6336033U (en) | 1986-08-22 | 1986-08-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12711686U JPS6336033U (en) | 1986-08-22 | 1986-08-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6336033U true JPS6336033U (en) | 1988-03-08 |
Family
ID=31021558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12711686U Pending JPS6336033U (en) | 1986-08-22 | 1986-08-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6336033U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5612745A (en) * | 1979-07-10 | 1981-02-07 | Nec Corp | Production of semiconductor device |
| JPS57112021A (en) * | 1980-12-29 | 1982-07-12 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS59188648A (en) * | 1983-04-11 | 1984-10-26 | Oki Electric Ind Co Ltd | Mask alignment key |
-
1986
- 1986-08-22 JP JP12711686U patent/JPS6336033U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5612745A (en) * | 1979-07-10 | 1981-02-07 | Nec Corp | Production of semiconductor device |
| JPS57112021A (en) * | 1980-12-29 | 1982-07-12 | Fujitsu Ltd | Manufacture of semiconductor device |
| JPS59188648A (en) * | 1983-04-11 | 1984-10-26 | Oki Electric Ind Co Ltd | Mask alignment key |