JPS63316919A - Snubber circuit for switching semiconductor device - Google Patents

Snubber circuit for switching semiconductor device

Info

Publication number
JPS63316919A
JPS63316919A JP62152662A JP15266287A JPS63316919A JP S63316919 A JPS63316919 A JP S63316919A JP 62152662 A JP62152662 A JP 62152662A JP 15266287 A JP15266287 A JP 15266287A JP S63316919 A JPS63316919 A JP S63316919A
Authority
JP
Japan
Prior art keywords
diode
snubber
circuit
recovery time
fast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62152662A
Other languages
Japanese (ja)
Other versions
JPH0549129B2 (en
Inventor
Toshio Shigekane
重兼 寿夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62152662A priority Critical patent/JPS63316919A/en
Publication of JPS63316919A publication Critical patent/JPS63316919A/en
Publication of JPH0549129B2 publication Critical patent/JPH0549129B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To lower the price of a snubber circuit by reducing the reverse bias safety operation area of a main transistor, by providing a parallel circuit with a first diode, and providing a second diode at least with the same polarity as that of the first diode and whose recovery time in a forward direction is smaller than that of the first diode. CONSTITUTION:A snubber diode equivalence circuit DSI is constituted of the parallel circuit of a fast switching diode D2 whose recovery time in the forward direction is slow and whose recovery time in a backward direction is fast used in an on-going device, and an ordinary diode D1 whose recovery time in the forward direction is fast and whose recovery time in the backward direction is slow. As the ordinary diode D1, a diode smaller in capacity than that of the fast switching diode D2 is selected. In such a way, when the main transistor Q1 starts to be turned off, a collector current Ic starts shunt to a snubber capacity Cs side at a fast rise speed via the D1 in the snubber diode equivalence circuit DSI. Thereby, a first spike voltage VP1: is decreased. Since the ordinary diode D1 is the one small in capacity and whose voltage drop VF in the forward direction is large, most of a shunt current flows on the fast switching diode D2.

Description

【発明の詳細な説明】[Detailed description of the invention] 【産業上の利用分野】[Industrial application field]

本発明は電力用高速スイッチング半導体装置に加わるス
パイク電圧を吸収するためのスナバ回路(サージアブリ
ーバ)に関するもので、特に高速用スナバダイオードの
順方向回復時間が遅いことに基づく第1のスパイク電圧
を容易に低減するためのスナバ回路に関する。 なお以下各図において同一の符号は同一もしくは相当部
分を示す。
The present invention relates to a snubber circuit (surge breaker) for absorbing a spike voltage applied to a high-speed switching semiconductor device for power use, and in particular, the present invention relates to a snubber circuit (surge breaker) for absorbing a spike voltage applied to a high-speed switching semiconductor device for power, and in particular to a first spike voltage due to the slow forward recovery time of a high-speed snubber diode. This invention relates to a snubber circuit for easy reduction. Note that in the following figures, the same reference numerals indicate the same or corresponding parts.

【従来の技術】[Conventional technology]

第4図はこの種のスイッチング用半導体装置の要部構成
例を示す回路図である。同図において■dは直流電源お
よびその電圧、Qlはスイッチング用主トランジスタ、
Lは負荷、DOは負荷りの両端に接続された転流ダイオ
ード、ISは主トランジスタQ1の主回路配線に生じた
浮遊インダクタンス、Cs、Rs、Dsはスナバ回路の
主体となるスナバコンデンサ、スナバ抵抗、スナバダイ
オードである。 スナバダイオードDsは主トランジスタQlがターンオ
フする際、浮遊インダクタンスISによって維持されよ
うとする主回路電流(この例ではコレクタ電流)Icを
スナバコンデンサCs 側へ4くためのもので、これに
より主トランジスタQlのコレクタ・エミッタ間へ過電
圧が加わることを抑制しようとするものである。 第5図は主トランジスタQ1がターンオフする際におけ
る、Qlのコレクタ・エミッタ電圧VCtと、このトラ
ンジスタQlのコレクタ電流1cの推移を示す波形図で
ある。この電圧VCEには2つのスパイク電圧、即ち第
1のスパイク電圧vplと第2のスパイク電圧■p2が
表われる。ここで第2のスパイク電圧Vp2は、 V I)z = V d + I c  1 s / 
Cs  −・−=−−−・(1)で示されるため、Vp
zを低くするためにはスナバコンデンサCsO値を大き
くすれば良いが、第1のスパイク電圧Vplは主トラン
ジスタQ1のターンオフの初期、即ちスナバダイオード
Dsの電流立上り時点に発する電圧であり、前記浮遊イ
ンダクタンスlsとスナバダイオードDsの順方向回復
時間で決まる。 例えば第6図に示される順方向特性を有する2つのダイ
オードDI、D2を想定する。なおここでV)は順方向
電圧降下、IFは順方向電流である。I) lは普通用
ダイオードであり、D2はライフタイムコントロールさ
れた高速用ダイオードであるとすると、高速用ダイオー
ドD2は第7図のダイオード電流の転流特性における実
線の逆回復電流IR2のように逆回復時間が短く、普通
用ダイオードDIは破線の逆回復電流TRIのように逆
回復時間が長い。 今、普通用ダイオードDIを第4図の回路に適用すると
、長い逆回復時間のため、第8図のように第2のスパイ
ク電圧Vp2が現れた後、このコレクタ・エミッタ電圧
VCEに立ち下り発振波形が現れ、ひいては主トランジ
スタQ1のドライブ回路の誤動作などを引き起こしやす
い。従って従来、スナバダイオードDsとしては高速用
ダイオードD2が使用されている。
FIG. 4 is a circuit diagram showing an example of the main part configuration of this type of switching semiconductor device. In the figure, ■d is a DC power supply and its voltage, Ql is the main transistor for switching,
L is the load, DO is the commutation diode connected to both ends of the load, IS is the stray inductance generated in the main circuit wiring of the main transistor Q1, and Cs, Rs, and Ds are the snubber capacitors and snubber resistors that are the main components of the snubber circuit. , which is a snubber diode. The snubber diode Ds is for directing the main circuit current (collector current in this example) Ic, which is to be maintained by the floating inductance IS, to the snubber capacitor Cs when the main transistor Ql is turned off. The purpose is to suppress the application of overvoltage between the collector and emitter of the device. FIG. 5 is a waveform diagram showing changes in the collector-emitter voltage VCt of Ql and the collector current 1c of this transistor Ql when the main transistor Q1 is turned off. Two spike voltages appear in this voltage VCE, namely a first spike voltage vpl and a second spike voltage p2. Here, the second spike voltage Vp2 is V I)z = V d + I c 1 s /
Since it is shown as Cs −・−=−−−・(1), Vp
In order to lower z, the value of the snubber capacitor CsO may be increased, but the first spike voltage Vpl is a voltage generated at the beginning of the turn-off of the main transistor Q1, that is, at the time of the rise of the current in the snubber diode Ds, and It is determined by ls and the forward recovery time of the snubber diode Ds. For example, assume two diodes DI and D2 having forward characteristics shown in FIG. Note that here, V) is a forward voltage drop, and IF is a forward current. I) Assuming that l is a normal diode and D2 is a lifetime-controlled high-speed diode, the high-speed diode D2 has a reverse recovery current IR2 shown by the solid line in the diode current commutation characteristics in Figure 7. The reverse recovery time is short, and the normal diode DI has a long reverse recovery time as indicated by the broken line reverse recovery current TRI. Now, if the ordinary diode DI is applied to the circuit shown in Fig. 4, because of the long reverse recovery time, after the second spike voltage Vp2 appears as shown in Fig. 8, the collector-emitter voltage VCE will fall and oscillate. A waveform appears, which is likely to cause malfunction of the drive circuit of the main transistor Q1. Therefore, a high speed diode D2 has conventionally been used as the snubber diode Ds.

【発明が解決しようとする問題点】[Problems to be solved by the invention]

第9図は第5図と同様な波形図、第10図は主トランジ
スタQ1のベース・エミ・ツタ間を逆バイアスすること
によりQlが誘導負荷をしゃ断する際のコレクタ電流1
cとコレクタ・エミッタ電圧VCEXの推移をIc、V
cExをそれぞれ縦軸、横軸にとって示した特性および
このような動作条件下における安全動作領域としての逆
バイアス安全動作領域RBSOAを示す図である。 ところでスナバダイオードDsとして逆回復特性の速い
高速用ダイオードD2を用いた場合、このD2の遅い順
回復特性のため(一般に逆回復の速い高速用ダイオード
は順回復が遅く、逆回復の遅い普通用ダイオードは順回
復が速い)、第9図で示されるような高い第1のスパイ
ク電圧Vp+が発生し、トランジスタ動作点が第1O図
のように逆バイアス安全動作領域RBSOAをはみ出し
、ひいては素子が破壊しやすい。このため従来は主トラ
ンジスタQlの逆バイアス安全動作領域RBSOAの大
きい素子を選択する必要があり、トランジスタ素子がコ
スト高となるという問題点がある。 本発明の目的は、高速用ダイオードD2を用いたスナバ
ダイオードDsの並列路に前記ダイオードD2と同極性
の普通用ダイオードDiを設けることにより、第1のス
パイク電圧V’ l) Iが低く、がつ第2のスパイク
電圧■p2が表れた後の電圧振動立ち下り現象を防止し
、主トランジスタの逆バイアス安全動作領域を小にでき
るスナバ回路を提供することにある。
Figure 9 is a waveform diagram similar to Figure 5, and Figure 10 is the collector current 1 when Ql cuts off the inductive load by reverse biasing the base, emitter, and ivy of the main transistor Q1.
The changes in c and collector-emitter voltage VCEX are expressed as Ic and V
FIG. 6 is a diagram showing characteristics in which cEx is plotted on the vertical and horizontal axes, respectively, and a reverse bias safe operating area RBSOA as a safe operating area under such operating conditions. By the way, when a high-speed diode D2 with a fast reverse recovery characteristic is used as the snubber diode Ds, due to the slow forward recovery characteristic of this D2 (in general, a high-speed diode with a fast reverse recovery has a slow forward recovery, and a normal diode with a slow reverse recovery (forward recovery is fast), a high first spike voltage Vp+ as shown in Figure 9 is generated, the transistor operating point goes outside the reverse bias safe operating area RBSOA as shown in Figure 1O, and the device is destroyed. Cheap. For this reason, it has conventionally been necessary to select a device with a large reverse bias safe operating area RBSOA of the main transistor Ql, which poses a problem in that the cost of the transistor device is high. An object of the present invention is to provide a normal diode Di having the same polarity as the diode D2 in a parallel circuit of a snubber diode Ds using a high-speed diode D2, so that the first spike voltage V'l) I is low and It is an object of the present invention to provide a snubber circuit which can prevent the voltage oscillation falling phenomenon after the second spike voltage p2 appears and can reduce the reverse bias safe operation area of the main transistor.

【問題点を解決するための手段】[Means to solve the problem]

前記の目的を達成するために本発明のスナバ回路は、「
スイッチング用半導体装置(主トランジスタQlなど)
に加わる過電圧を吸収するためのスナバ回路であって、 少なくともコンデンサ(スナバコンデンサCsなど)と
、 前記スイッチング用半導体装置のターンオフの際、該装
置を流れていた電流(コレクタ電流1cなど)に基づく
、前記半導体装置と直列の浮遊インタリクンス(lsな
ど)のエネルギを前記コンデンサへ導く第1のダイオー
ド(高速用ダイオードD2など)と、を備えたスナバ回
路において、前記第1のダイオードに並列回路を設け、
この並列回路に少なくとも前記第1のダイオードと同極
性で、かつ前記第1のダイオードより順方向回復時間が
短い第2のダイオード(普通用ダイオードDIなど)を
設けたjものとする。
In order to achieve the above object, the snubber circuit of the present invention has the following features:
Switching semiconductor devices (main transistor Ql, etc.)
A snubber circuit for absorbing overvoltage applied to the switching semiconductor device, which is based on at least a capacitor (such as a snubber capacitor Cs) and a current flowing through the switching semiconductor device (such as a collector current 1c) when the device is turned off. A snubber circuit comprising a first diode (such as a high-speed diode D2) that guides the energy of floating interlock (ls, etc.) in series with the semiconductor device to the capacitor, and a parallel circuit is provided to the first diode,
It is assumed that this parallel circuit is provided with at least a second diode (such as a normal diode DI) which has the same polarity as the first diode and has a shorter forward recovery time than the first diode.

【作 用】[For use]

第1のダイオードは高速用であって逆回復時間が短く第
2のスパイク電圧Vpt以後の電圧振動は発生しないが
、他方順回復時間が長く、第1のスパイク電圧Vial
が大となりスイッチング用半導体装置の耐圧破壊を招き
やすい。 第2のダイオードは順回復時間の短い普通用であって第
1のダイオードの電流が立ち上る初期にのみ動作し、第
1のスパイク電圧■plを低減する。
The first diode is for high speed and has a short reverse recovery time, so no voltage oscillations occur after the second spike voltage Vpt, whereas the first diode has a long forward recovery time and the first spike voltage Vial
becomes large, which tends to cause voltage breakdown of the switching semiconductor device. The second diode is a normal diode with a short forward recovery time, and operates only at the initial stage when the current of the first diode rises to reduce the first spike voltage pl.

【実施例】【Example】

第1図ないし第3図はそれぞれ本発明の異なる実施例を
示す要部回路図で第4図に対応するものである。この第
1図〜第3図においてDSlは第4図のスナバダイオー
ドD3に相当する回路(スナバダイオード相当回路とい
う)で、主トランジスタQlおターンオフ時、主回路配
線浮遊インダクタンスesのエネルギをスナバコンデン
サCs側へ導くためのものである。 第1図、第2図においてはこのスナバダイオード相当回
路DSLを順回復時間が遅く、逆回復時間が速い従来使
用の高速用ダイオードD2と順回復時間が速く、逆回復
時間が遅い普通用ダイオードDIとの並列回路で構成し
ている。この第1図。 第2図では普通用ダイオードDiの容量は高速用ダイオ
ードD2よりも小容量のものを選択する。 これにより主トランジスタQlがターンオフを開始する
とコレクタ電流1cはスナバダイオード相当回路DSI
内の普通用ダイオードDIを介してスナバコンデンサC
s側に直ちに早い立上り速度で分流を開始し、これによ
り第1のスパイク電圧Vp+は低減される。ここで時間
の経過と共に高速用ダイオードD2が全導通可能となり
、一方普通用ダイオードDiは小容量でその順方向電圧
降下V、が大となることから、前記分流電流は大部分高
速用ダイオードD2に移行するようになる。なおこのよ
うにするためには必要に応じ例えば普通用ダイオードD
Iと直列に図外の無誘導抵抗を挿入してもよい。 この様に小容量の普通様ダイオードDiを新たに付加す
ることにより、このダイオードDI内の蓄積キャリヤは
少ないため、結果としてDiの逆回復電流、従って逆回
復時間は相対的に大きくなく、第2のスパイク電圧V9
を以後の主トランジスタQ1のコレクタ・エミッタ電圧
■。の振動の発生を防止することができる。 また第3図においてはスナバダイオード相当回路Dsl
において、普通用ダイオードD1と直列に新たなコンデ
ンサC1を、また該ダイオードD1と並列に新たな抵抗
R1を設けている。この第3図では普通用ダイオードD
1に対する容量上の制約はない。コンデンサC1は主ト
ランジスタQ1のターンオフの開始時点から、高連用ダ
イオードD2の全導通に到る迄の間、普通用ダイオード
DIの通電を行わせ、以後D1の通電を断つためのもの
であり、抵抗R1はコンデンサCIの放電用抵抗である
。 この回路では主トランジスタQlのターンオフ終了時点
では、普通用ダイオードD1の通電々流は消滅している
ので、Dlの逆回復電流は無く、従って第2のスパイク
電圧■ρ2以後のvC!の振動は発生しない。 以上の実施例ではQlはトランジスタとして説明したが
、このスイッチング用半導体素子Q1に相当するものと
してはPNP)ランジスタ、  FET、IGBT、S
CR,GTO等の他の半導体素子であってもかまわない
。また新たに付加されたダイオードDIは従来使用のダ
イオードD2より逆回復時間が速くてもかまわない。要
は新設のダイオードDIの順回復特性が従来使用のダイ
オードD2の順回復特性より速いことが重要である。
1 to 3 are principal circuit diagrams showing different embodiments of the present invention, and correspond to FIG. 4. In FIGS. 1 to 3, DS1 is a circuit corresponding to the snubber diode D3 in FIG. 4 (referred to as a snubber diode equivalent circuit). It is meant to lead you to the side. In Figures 1 and 2, this snubber diode equivalent circuit DSL is used as a conventional high-speed diode D2 with a slow forward recovery time and a fast reverse recovery time, and a normal diode DI with a fast forward recovery time and a slow reverse recovery time. It consists of a parallel circuit with This first figure. In FIG. 2, the capacity of the ordinary diode Di is selected to be smaller than that of the high-speed diode D2. As a result, when the main transistor Ql starts to turn off, the collector current 1c changes to the snubber diode equivalent circuit DSI.
snubber capacitor C via the common diode DI in
Shunting to the s side is immediately started at a fast rising speed, thereby reducing the first spike voltage Vp+. Here, as time passes, the high-speed diode D2 becomes fully conductive, while the ordinary diode Di has a small capacity and its forward voltage drop V becomes large, so most of the shunt current flows to the high-speed diode D2. will begin to migrate. In addition, in order to do this, if necessary, for example, a general diode D
A non-inductive resistor (not shown) may be inserted in series with I. By adding a new small-capacity ordinary-like diode Di in this way, the accumulated carriers in this diode DI are small, and as a result, the reverse recovery current of Di, and therefore the reverse recovery time, is not relatively large, and the second spike voltage V9
Hereafter, the collector-emitter voltage of the main transistor Q1 is ■. vibration can be prevented from occurring. In addition, in Fig. 3, a snubber diode equivalent circuit Dsl
, a new capacitor C1 is provided in series with the normal diode D1, and a new resistor R1 is provided in parallel with the diode D1. In this figure 3, the ordinary diode D
There are no capacity constraints for 1. The capacitor C1 is used to energize the ordinary diode DI from the start of turn-off of the main transistor Q1 until the high-speed diode D2 becomes fully conductive, and thereafter cut off the energization of D1. R1 is a resistor for discharging the capacitor CI. In this circuit, at the end of turn-off of the main transistor Ql, the current flowing through the normal diode D1 has disappeared, so there is no reverse recovery current of Dl, and therefore the second spike voltage ■vC! after ρ2! No vibration occurs. In the above embodiments, Ql was explained as a transistor, but devices corresponding to this switching semiconductor element Q1 include a PNP) transistor, FET, IGBT, S
Other semiconductor elements such as CR and GTO may also be used. Further, the newly added diode DI may have a faster reverse recovery time than the conventionally used diode D2. In short, it is important that the forward recovery characteristic of the newly installed diode DI is faster than that of the conventionally used diode D2.

【発明の効果】【Effect of the invention】

本発明によればスイッチング用半導体装置のスナバダイ
オードに並列回路を設け、この並列回路内に少なくとも
従来のスナバダイオードDS (=D2)と同極性で、
かつスナバダイオードD2より順回復特性の速い普通用
ダイオードD1を設けることとしたので、次のような効
果を得ることができる。 ■スイッチング用半導体素子のターンオフ時の両端電圧
中に第2のスパイク電圧■pt以後の電圧振動を生ずる
ことなく、第1のスパイク電圧Vpい従ってこの素子の
耐圧を低減し、この素子を安価なものとすることができ
る。 ■ダイオードD1はダイオードD2の順回復時間中のみ
働けば良いので、ダイオードD2より小形で安価なもの
でよく、ダイオードD1を新設したスナバ回路自体を安
価に構成できる。 ■スナバ回路設計の際、スナバダイオードD2として逆
回復特性のみに注目して選定すれば良いので、選定対象
範囲が拡がり、ひいては設計時間の短縮につながる。
According to the present invention, a parallel circuit is provided in the snubber diode of the switching semiconductor device, and in this parallel circuit, at least the same polarity as the conventional snubber diode DS (=D2),
In addition, since the ordinary diode D1, which has a faster forward recovery characteristic than the snubber diode D2, is provided, the following effects can be obtained. ■The second spike voltage in the voltage across the switching semiconductor element at the time of turn-off ■The first spike voltage Vp without causing any voltage oscillation after pt. Therefore, the withstand voltage of this element is reduced, and this element can be made inexpensive. can be taken as a thing. (2) Since the diode D1 only needs to work during the forward recovery time of the diode D2, it can be smaller and cheaper than the diode D2, and the snubber circuit itself newly provided with the diode D1 can be constructed at a lower cost. - When designing the snubber circuit, it is only necessary to select the snubber diode D2 by paying attention to its reverse recovery characteristics, which expands the scope of selection and ultimately shortens the design time.

【図面の簡単な説明】[Brief explanation of drawings]

第1図ないし第3図はそれぞれ本発明の異なる実施例と
しての要部回路図、第4図は第1図ないし第3図に対応
する従来の要部回路図、第5図ないし第10図は第4図
の動作説明用の特性図または波形図である。 vd:主直流電源、Ql:主トランジスタ、lS;浮遊
インダクタンス、L:負荷、Do:転流ダイオード、D
SI:スナバダイオード相当回路、D2:高速用ダイオ
ード、D1=9通用ダイオード、C3:スナバコンデン
サ、R8:スナバ抵抗、C1:コンデンサ、R1:抵抗
。 方 1 図 第2図 第3図 第4図
1 to 3 are main part circuit diagrams as different embodiments of the present invention, FIG. 4 is a conventional main part circuit diagram corresponding to FIGS. 1 to 3, and FIGS. 5 to 10. is a characteristic diagram or a waveform diagram for explaining the operation of FIG. 4; vd: Main DC power supply, Ql: Main transistor, lS: Floating inductance, L: Load, Do: Free-wheeling diode, D
SI: snubber diode equivalent circuit, D2: high speed diode, D1 = 9-purpose diode, C3: snubber capacitor, R8: snubber resistor, C1: capacitor, R1: resistor. Method 1 Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】 1)スイッチング用半導体装置に加わる過電圧を吸収す
るためのスナバ回路であって、 少なくともコンデンサと、 前記スイッチング用半導体装置のターンオフの際、該装
置を流れていた電流に基づく、前記半導体装置と直列の
浮遊インダクタンスのエネルギを前記コンデンサへ導く
第1のダイオードと、を備えたスナバ回路において、 前記第1のダイオードに並列回路を設け、この並列回路
に少なくとも前記第1のダイオードと同極性で、かつ前
記第1のダイオードより順方向回復時間が短い第2のダ
イオードを設けたことを特徴とするスイッチング用半導
体装置のスナバ回路。
[Scope of Claims] 1) A snubber circuit for absorbing overvoltage applied to a switching semiconductor device, the snubber circuit comprising: at least a capacitor; and a snubber circuit based on the current flowing through the switching semiconductor device when the device is turned off. a first diode that guides the energy of a stray inductance in series with the semiconductor device to the capacitor, a snubber circuit comprising a parallel circuit for the first diode, and a parallel circuit that includes at least the first diode and the first diode. 1. A snubber circuit for a switching semiconductor device, comprising a second diode having the same polarity and a shorter forward recovery time than the first diode.
JP62152662A 1987-06-19 1987-06-19 Snubber circuit for switching semiconductor device Granted JPS63316919A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62152662A JPS63316919A (en) 1987-06-19 1987-06-19 Snubber circuit for switching semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62152662A JPS63316919A (en) 1987-06-19 1987-06-19 Snubber circuit for switching semiconductor device

Publications (2)

Publication Number Publication Date
JPS63316919A true JPS63316919A (en) 1988-12-26
JPH0549129B2 JPH0549129B2 (en) 1993-07-23

Family

ID=15545343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62152662A Granted JPS63316919A (en) 1987-06-19 1987-06-19 Snubber circuit for switching semiconductor device

Country Status (1)

Country Link
JP (1) JPS63316919A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0654538A (en) * 1991-10-25 1994-02-25 Semikron Elektron Gmbh Free-wheeling diode device for rectification passage
WO2001026207A3 (en) * 1999-10-01 2002-01-17 Online Power Supply Inc Non-saturating magnetic element(s) power converters and surge protection
US6493242B1 (en) 1999-10-01 2002-12-10 Online Power Supply, Inc. Power factor controller
US6952355B2 (en) 2002-07-22 2005-10-04 Ops Power Llc Two-stage converter using low permeability magnetics

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0654538A (en) * 1991-10-25 1994-02-25 Semikron Elektron Gmbh Free-wheeling diode device for rectification passage
WO2001026207A3 (en) * 1999-10-01 2002-01-17 Online Power Supply Inc Non-saturating magnetic element(s) power converters and surge protection
US6493242B1 (en) 1999-10-01 2002-12-10 Online Power Supply, Inc. Power factor controller
US6504423B2 (en) 1999-10-01 2003-01-07 Online Power Supply, Inc. Solid state driving circuit
US6507501B2 (en) 1999-10-01 2003-01-14 Online Power Supply, Inc. Individual or distributed non-saturating magnetic element(s) (referenced herein as NSME) power converters
US6567281B2 (en) 1999-10-01 2003-05-20 Online Power Supply, Inc. Individual or distributed non-saturating magnetic element(s) power converters and multi-stage converters
US6952355B2 (en) 2002-07-22 2005-10-04 Ops Power Llc Two-stage converter using low permeability magnetics

Also Published As

Publication number Publication date
JPH0549129B2 (en) 1993-07-23

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