JPS6331454U - - Google Patents
Info
- Publication number
- JPS6331454U JPS6331454U JP12403686U JP12403686U JPS6331454U JP S6331454 U JPS6331454 U JP S6331454U JP 12403686 U JP12403686 U JP 12403686U JP 12403686 U JP12403686 U JP 12403686U JP S6331454 U JPS6331454 U JP S6331454U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- read
- decoder
- chip select
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Description
第１図は本考案のチツプセレクト信号発生回路
の一実施例を示したブロツク図、第２図は第１図
に示した回路の動作波形図、第３図は従来のチツ
プセレクト信号発生回路の一例を示したブロツク
図である。
１……デコーダ、３……オア回路。
Fig. 1 is a block diagram showing an embodiment of the chip select signal generating circuit of the present invention, Fig. 2 is an operating waveform diagram of the circuit shown in Fig. 1, and Fig. 3 is a diagram of the conventional chip select signal generating circuit. FIG. 2 is a block diagram showing an example. 1...decoder, 3...OR circuit.
Claims (1)
間イネーブルとなつて、別途入力される複数のア
ドレス信号値の組合せにより複数の出力端子のい
ずれか１つよりチツプセレクト信号を出力するデ
コーダにおいて、特定の範囲の前記出力端子から
前記チツプセレクト信号の１つを出力させる前記
アドレス信号値の組合せ時、前記リード又はライ
トストローブ信号の状態に拘らずデコーダを常に
イネーブルとする制御手段を設けたことを特徴と
するチツプセレクト信号発生回路。 In a decoder that is enabled during a period when a read or write strobe signal is input, and outputs a chip select signal from one of a plurality of output terminals based on a combination of a plurality of separately input address signal values, A chip selector comprising control means for always enabling a decoder regardless of the state of the read or write strobe signal when the address signal values are combined to output one of the chip select signals from an output terminal. Signal generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12403686U JPS6331454U (en) | 1986-08-14 | 1986-08-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12403686U JPS6331454U (en) | 1986-08-14 | 1986-08-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6331454U true JPS6331454U (en) | 1988-03-01 |
Family
ID=31015685
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12403686U Pending JPS6331454U (en) | 1986-08-14 | 1986-08-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6331454U (en) |
-
1986
- 1986-08-14 JP JP12403686U patent/JPS6331454U/ja active Pending
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