JPS63311296A - Connection type display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a connected display device that is used to display multi-digit numbers, characters, etc. by connecting a large number of display units in series.

(Prior Art) Conventional connected display devices usually require individual wiring to send data signals to be displayed to each stage of display units. As shown, all stages of the display unit (
At the same time, data signals are sent to the latch signal lines (60), which are individually wired to each display unit (60).
51), a format in which the display unit (60) of each stage instructs the timing at which data should be latched has become widespread. However, in such a conventional connected display device, it is necessary to connect a large number of terminals protruding from the back of each display unit (60) with each other using lead wires, and in addition, it is necessary to connect each display unit from the control section to each stage of the display unit. Since the latch signal line (51) must be wired to (60), if the number of digits is large, wiring man-hours will increase and reliability will decrease due to poor connection. There were problems such as the need for a considerable amount of space.

(Problems to be Solved by the Invention) The present invention solves the above-mentioned conventional problems, eliminates the need for wiring work between each display unit even when there are many connected stages, and reduces wiring man-hours. It was completed with the aim of creating a connected display device that can improve reliability and reduce wiring space.

(Means for Solving the Problems) The present invention provides a male connector with a large number of connector pins protruding on one side of a display unit including a display section and a control section, and a male connector with a large number of connector pins protruding on the opposite side. A female connector that engages with the male connector is provided, and these connector pins have a data signal line that supplies data signals to be displayed to all stages, a clock signal line that instructs the timing to latch data and display it on the display section, A latch control signal line that issues a latch enable signal to the display unit in the subsequent stage after its own data latch is completed, and a reset.

This feature is characterized in that the two signal lines are connected to each other.

(Embodiment) Next, the present invention will be explained in more detail with reference to the illustrated embodiment. In FIG. +1) is the display part (2) and the control part (
3), and each display unit +11 is provided with a male connector (5) having a number of connector pins (4) vertically protruding from one side of its end, and an adjacent male connector (5) on the opposite side. Male connector (5) of display unit (1)
A female connector (6) that engages with the display unit (11,
4) are connected in series. Although not shown in the drawings, it is preferable that the case of the display unit is also provided with a retaining means for ensuring mutual connection.

As schematically shown in Figure 2, each connector pin (4)
has a data signal line (11) and a clock signal line (12).
, a reset signal line (13), and a latch control signal line (1
4) are allocated and connected respectively.

This is shown as a wiring diagram in Figure 3.

As shown in the figure, the control section (3) of each display unit +1) includes a data latch section (3a) and a latch control section (3b).
) The data signal to be displayed is commonly input to all stages of the data latch section (3a) via the data signal line (1) by a pass line method, and is also input to the latch control section (3b). A clock signal and a reset signal are input in the same way, and the latch control signal lines (14) of each stage are connected in series.

The operation of each display unit (1) is as shown in FIG. That is, as in step 1, while the latch enable input signal input from the previous stage via the latch i#Im signal line (14) is at high level, the data signal is not latched even if the clock signal is input. Although no data is displayed on the display section (2), when the latch enable input signal becomes low level as in step 2, a signal is sent to the data latch section (3a) at the same time as the clock signal rises. The data signal is latched only once, and the data is displayed on the display section (2). Also, at the same time as this clock signal falls, the latch permission output signal, which had been at high level until then, is inverted to low level. Note that when the reset signal is input as in step 3, the display section (2) is turned off and the latch permission output signal is reset to high level. The latch permission output signal, which is inverted to low level at the falling edge of the clock signal, is input as a latch permission input signal to the display unit (1) in the subsequent stage through the latch permission signal line (14) mentioned above. Ru.

As a result, when the latch enable input signal is set to low level, the display unit (1) of the first stage is synchronized with the clock signal.
Since the data signal is sequentially fetched from 1 to the subsequent stage, if the data signal is sent to all stages via the data signal line (11) in synchronization with the clock signal, the display unit (1 ) can display a desired data signal.

FIG. 5 shows an embodiment in which the above-described operation is performed by a latch control section (3b) using a flip-flop.

First, when the latch enable input signal is at high level as in step 1, a low level signal inverted by the inverter (21) is sent to the first D-type flimp-flop (2
2), and at the same time as the clock signal rises, this low level signal is input to the D terminal of the second D-type flip-flop (23). At this time, a low level signal is sent to the data latch section (3a), and at the same time as the 0th clock signal falls, the data is inverted by the second inverter (24) and set to a rising state. The clock signal is input to the second D-type flip-flop (23), but at this time, a high level signal is output from the Q terminal of the second inverter (24) to the subsequent stage as a latch enable output signal. , data latching is similarly not performed in subsequent stages.

However, when the latch enable input signal becomes low level as in step 2, a high level signal is input to the D terminal of the second D-type flip-flop (23) at the same time as the clock signal rises, contrary to what was described above. Data latch section (
At the same time as the falling of the 0th order clock signal when the data latch command is issued to 3a), a low level signal is output from the 100 terminal of the second D-type Frisobfromp (23) to the succeeding stage. Data latching is performed one after another in synchronization with the clock signal in the stages.

The same operation as above is performed by using a microcomputer with the software shown in the flowchart in Figure 6 as a display unit in each stage.
This can also be done by incorporating it inside.

1! II. Data is read and displayed only when three conditions are met: the display section (2) is not displaying data, the latch enable input signal is at low level, and the clock signal is input. If this is done and a latch permission output signal is issued to the subsequent stage, it is possible to perform the same operation as shown in FIG.

(Function) The connected display device of the present invention configured as described above has a male connector (5) and a female connector (6) of each display unit (II).
) can be freely coupled in series in the required number of stages by mutually engaging the data signal lines ( 11) If a data signal is input in common to all stages through If you let it, 1
Each time a clock signal is input, data is latched one stage at a time toward the subsequent stage, and the display unit (1) of all stages is latched.
is used to display each digit. Therefore, in the present invention, there is no need to individually instruct the timing at which data latches should be performed for each stage of display units 11) as in the past (this eliminates the need for wiring latch signal lines, and simply connects the display units 11) to By just connecting them in series, there is no need for any wiring between them.

(Effects of the Invention) As is clear from the above description, the present invention can display the required number of digits by simply connecting the display units of each stage in series, and also Since no wiring is required, it has many advantages such as reduced wiring man-hours, improved reliability, and reduced wiring space. Therefore, the present invention greatly contributes to the development of industry as a connected display device that eliminates the problems of the conventional art.

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing a connected display device of the present invention, Fig. 2 is a wiring diagram schematically showing the connection relationship between each connector pin and each signal line, Fig. 3 is a wiring diagram thereof, and Fig. 4 5 is a timing diagram showing the operation, FIG. 5 is a circuit diagram showing an embodiment in which the operation shown in FIG. 4 is performed by a flip-flop, and FIG. 6 is a flow chart when the same operation is performed using software. FIG. 7 is a wiring diagram showing a conventional connected display device. (l): Display unit, (2): Display section, (3): Control section, (4): Connector pin, (5): Male connector, (6
): Female connector, (11): Data signal line, (12
): Clock signal line, (13): Reset signal line,
(14): Latch control signal line. Figure 1 7 Figure 2 Figure 3 Figure 4 Stetua 1 Stetua 2 Matata, 7
3 No. 5■ Fig. 6 Fig. 7 Procedural amendment (voluntary) August 5, 1985 1. Indication of the case 1988 Patent Application No. 147639 2. Title of the invention Interlocking display device 3. Amendments to be made Patent applicant address: 4-7-1-4, Himuro-cho, Takatsuki-shi, Osaka Prefecture, Agent 6, adds the following sentence after the 14th line of page 9 of the statement of contents of the amendment. In the embodiment described above, when a reset signal is input from the reset signal line (13), the display parts (2) of each display device are turned off simultaneously, and in the next cycle, the lights are turned off sequentially from the previous stage to the next stage. The display section (2) is turned on, but with this method, the lighting duration time of the rear display section (2) is shorter than that of the front display section (2), and the display section (2) is illuminated for a shorter period of time. Differences in brightness may occur, making it difficult to see.Furthermore, when the display device of the present invention is incorporated into a control circuit using a sequencer, the period of the clock signal or reset signal may vary depending on control processing factors. change,
There are variations in the lighting time of each digit, but the display part (2)
may become difficult to see. Therefore, in such a case, if the display section (2) is not turned off even when the reset signal is input, but only the latch enable signal is reset, all data will be displayed until the new data of the next cycle is displayed. The display part (2) of the stage is always kept lit, and the above-mentioned problems can be prevented. "that's all

Claims (1)

[Claims] A display unit (
A male connector (5) with a large number of connector pins (4) protruding is provided on one side of the display unit (1), and a female connector (6) that engages with the male connector (5) of the adjacent display unit (1) is provided on the opposite side. ), and these connector pins (4) have data signal lines (
11), a clock signal line (12) that instructs the timing to latch data and display it on the display unit (2), and a latch permission for the display unit (1) in the subsequent stage after its own data latch is completed. A connected display device characterized in that a latch control signal line (14) that emits a signal and a reset signal line (13) are connected to each other.