JPS6330822B2 - - Google Patents

Info

Publication number
JPS6330822B2
JPS6330822B2 JP5297483A JP5297483A JPS6330822B2 JP S6330822 B2 JPS6330822 B2 JP S6330822B2 JP 5297483 A JP5297483 A JP 5297483A JP 5297483 A JP5297483 A JP 5297483A JP S6330822 B2 JPS6330822 B2 JP S6330822B2
Authority
JP
Japan
Prior art keywords
signal
asynchronous
time slot
multiplexing
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5297483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59178034A (ja
Inventor
Tetsuo Murase
Hisanobu Fujimoto
Masahiro Shinbashi
Masashi Nakazumi
Takeo Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5297483A priority Critical patent/JPS59178034A/ja
Publication of JPS59178034A publication Critical patent/JPS59178034A/ja
Publication of JPS6330822B2 publication Critical patent/JPS6330822B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)
JP5297483A 1983-03-29 1983-03-29 デ−タ伝送方式 Granted JPS59178034A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5297483A JPS59178034A (ja) 1983-03-29 1983-03-29 デ−タ伝送方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5297483A JPS59178034A (ja) 1983-03-29 1983-03-29 デ−タ伝送方式

Publications (2)

Publication Number Publication Date
JPS59178034A JPS59178034A (ja) 1984-10-09
JPS6330822B2 true JPS6330822B2 (enrdf_load_stackoverflow) 1988-06-21

Family

ID=12929863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5297483A Granted JPS59178034A (ja) 1983-03-29 1983-03-29 デ−タ伝送方式

Country Status (1)

Country Link
JP (1) JPS59178034A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04207883A (ja) * 1990-11-30 1992-07-29 Fujitsu Ltd クロック同期方式
GB2371951B (en) * 1999-10-05 2004-04-14 Fujitsu Ltd Multiplexing method and device suitable for overhead data transmission from many communication lines
JP2003140995A (ja) 2001-10-31 2003-05-16 Fujitsu Ltd ネットワークエレメントの管理方法及び装置、並びにネットワーク管理システム

Also Published As

Publication number Publication date
JPS59178034A (ja) 1984-10-09

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