JPS63296507A - Fixing circuit for potential of signal line - Google Patents

Abstract

PURPOSE:To fix a prescribed signal stably by combining 1st and 2nd transistors (TR) being a complementary pair and a 3rd TR of a conduction type. CONSTITUTION:The 1st and 2nd TRs 11, 12 being a complementary pair and the 3rd TR 10 of a conduction type are provided, Sources, drains and gates of the 1st and 2nd TRs 11, 12 are connected in common in parallel, the common drain is connected to the gate of the 3rd TR 10, the common gate and the drain of the 3rd TR 10 are coupled and connected to the signal source 14, the common sources of the 1st and 2nd TRs 11, 12 are connected to a 1st power supply, the source of the 3rd TR is connected to a 2nd power supply respectively. Thus, the signal line is stably fixed to a prescribed level without being connected directly to the power terminal or ground terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to means for fixing the potential of a predetermined signal terminal, that is, a signal line potential fixing circuit.

Conventional Technology In a transistor circuit, in order to fix the potential of a specific signal line, the specific signal line is generally fixed to a predetermined potential of a single or multiple transistors in the circuit section that is the source. In this case, a circuit method is used in which the signal is connected to the power supply terminal or the ground terminal directly or through a resistor, or a circuit method is used in which the specific signal and the circuit part that is its source are disconnected and connected to the power supply terminal or the ground terminal directly or through a resistor. It is being

Problems to be Solved by the Invention In the case of such conventional circuit systems, the gate input of the transistor is directly affected by noise generated at the ground terminal or power supply terminal, or in some cases, it is directly connected to the power supply terminal or the ground terminal. This may cause problems for the transistor circuit, such as the gate potential of the transistor becoming higher than the power supply voltage connected to its source or lower than the ground potential. Note that when this method is used for the input/output terminals of semiconductor integrated circuits and their peripheral circuits,
Reliability that the gate oxide film is easily destroyed when a transient high potential spike due to static electricity is directly applied from the outside to the drain or source side of a transistor whose gate is directly connected to the power supply terminal or ground terminal. The above issues must also be considered.

Means for Solving the Problems The present invention is intended to solve the above-mentioned problems, and the first . a second transistor and a third transistor of one conductivity type; The sources, drains, and gates of the second transistors are commonly connected in parallel, and the common drain is coupled to the gate of the third transistor, and the common gate and the drain of the third transistor are connected together. a signal line potential fixing circuit, which is connected to a signal source; a common source of the first and second transistors is connected to a first power source; and a source of the third transistor is connected to a second power source. It is.

According to the present invention, a desired signal line can be set to a predetermined potential depending on the potential of the first power source or the second power source by selecting its conductivity type using a combination of three transistors.

EXAMPLES The present invention will now be described with reference to FIGS. 1 and 2. Fig. 1 shows a circuit for stably fixing the potential of a predetermined signal line at a low level (hereinafter abbreviated as "L" fixing circuit), and Fig. 2 shows a circuit for stably fixing the potential of a predetermined signal line at a high level. A circuit (hereinafter abbreviated as "H" fixing circuit) for fixing is shown below.

In the "L" fixed circuit shown in FIG. 1, even though it is not possible to determine whether the signal line 14 to be fixed is at a high level or a low level immediately after power is applied to the transistor circuit, If the potential is at a low level or close to a low level, the source side is connected to the positive circuit power supply Vc.
The P-channel type MO transistor 10 connected to the terminal 13 of (low level)
Fix it stably. Conversely, assuming that the signal line 14 is at a high level or a potential close to a high level immediately after power is applied, the N-channel MOS transistor 11 whose source side is connected to the positive terminal 13 of the circuit power supply Vcc operates, and the same as described above occurs. The N-channel MOS transistor 12 is driven to invert the signal line 14 from high level to low level, and then the P-channel MOS transistor 10 and the N-channel MOS transistor 12 are used.

The signal line 14 is stably fixed at a low level.

The "H" fixed circuit in Figure 2 operates in the same way as the "L" fixed circuit, but the signal line 2 to be fixed is
Assuming that 0 is at a high level or a potential close to a high level after the power supply surface is applied, the signal line 20 is stably fixed at a high level by the operation of the N-channel type MoS transistor 16 and the P-channel type MO8 transistor 18.

Conversely, assuming that the signal line 20 is at a low level or a potential close to a low level immediately after power is applied, the P-channel MOS transistor 17 operates first, and the P-channel MOS transistor 17 operates.
The O8 transistor 18 is driven, the signal line 20 is reversed from low level to high level, and then the N-channel type MO
It is stably fixed at a high level by the operation of the S transistor 16 and the P channel type MO transistor 18. In this way, in the °L" fixed circuit and the "H" fixed circuit,
It is possible to stably fix the signal line at a predetermined level without directly connecting the signal line to a power supply terminal or a ground terminal, and a highly reliable signal line potential fixing circuit can be obtained.

Effects of the Invention' As is clear from the above explanation, in the "L" fixed circuit and "H" fixed circuit of the present invention, the gate of the transistor can be connected directly to the power supply terminal or the ground terminal by using a simple combination of transistors. (A predetermined signal can be stably fixed by connecting to , since each transistor can be realized with almost the minimum size, it is also suitable for semiconductor integrated circuits.

[Brief explanation of the drawing]

FIGS. 1 and 2 are circuit diagrams of an "L" fixed circuit and an "H" fixed circuit according to an embodiment of the present invention. 14.20...Signal line to be fixed, 10.17
゜18...P-channel type MOS transistor,
11゜12.16...N-channel MOS transistor, 13.19...Positive circuit power supply terminal,
15.21... Ground terminal.

Claims (1)

[Claims] It has a complementary pair of first and second transistors and a third transistor of one conductivity type, and the first and second transistors are commonly connected in parallel with each other's sources, drains, and gates. a common drain coupled to the gate of the third transistor; the common gate and the drain of the third transistor coupled to a signal source; and the common source of the first and second transistors coupled to the first transistor. A signal line potential fixing circuit configured to connect a power source and a source of the third transistor to a second power source, respectively.