JPS63288044A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the warpage of an Si substrate and a possibility that crystal defect is generated without applying excessive stress to the substrate by a method wherein a thick Si dioxide film is formed only on the end parts of a poly Si layer and the thick Si dioxide film is not formed on the central part of the poly Si layer. CONSTITUTION:An oxide film 3 is formed on the surface of an Si substrate 1 comprising a collector buried layer 2 provided therein and the substrate 1 is etched to form a groove 4 which penetrates the layer 2. After the film 3 is removed, the surface is oxidized to form an oxide film 5 on the whole surface and an Si3N4 film 6 is formed thereon. Then, a polySi layer 7 of a thickness equivalent to the depth of the groove 4 is formed, its surface is oxidized to form an oxide film 8 and an Si3N4 film 9 is formed. A resist pattern 10 is formed, the films 9 and 8 are selectively etched using the pattern 10 as a mask and the film 6 is etched until its surface is exposed using these films 8 and 9 as masks. The layer 7 is oxidized using the films 6 and 9 as masks to form an oxide film 11. Then, an etching is performed to complete an isolation process.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor integrated circuit.
The present invention relates to a method of burying polycrystalline silicon through an insulator into a trench formed by etching Si to perform isolation.

[Prior Art] As the degree of integration of various semiconductor integrated circuits improves,
Insulation between each element, that is, isolation, has become a major problem.

That is, the junction layer generally used for the isolation between each element has problems such as requiring a large area and generating parasitic capacitance. Therefore.

Currently, a method has been proposed in which a U-shaped groove is formed in the substrate and this groove is filled with a dielectric material, polycrystalline silicon, or the like to achieve isolation.

Conventionally, the surface of the polycrystalline SL embedded in the groove was completely oxidized to insulate the surface of the isolation region.

[Problem to be solved by the invention] However, when the entire surface of polycrystalline Si is oxidized in this way,
As the oxide film grows, a large stress is applied to the substrate, causing the substrate to warp and crystal defects to occur in the substrate.

[Means for Solving the Problems] The present invention has been made to solve such conventional problems, and it is possible to avoid applying large stress to the substrate by selectively oxidizing only the edges of the isolation region. The combination of a thick oxide film at the edges and a thin oxide film at the center (or insulation III formed by CVD, etc.) ensures good electrical Ma properties and microprocessability (self-alignment). .

[Function] A thick silicon dioxide film is formed only on the edges of the polycrystalline silicon, and no thick silicon dioxide film is formed in the center, so excessive stress is not applied to the silicon substrate, which prevents the substrate from warping. The risk of crystal defects occurring is significantly reduced.

[Example] The present invention will be described in detail below using an example applied to the manufacture of a bipolar integrated circuit.

First, as shown in FIG. 1, an oxide film 3 is formed on the surface of a Si substrate 1 provided with a collector buried layer 2, and this is patterned by a normal photoetching method.

Furthermore, using this oxide film 3 as a mask, the Si substrate 1 was etched to form a groove 4 penetrating the buried layer 2. next,
As shown in FIG. 2, after removing the oxide film 3, the surface is oxidized to form an oxide film 5 on the entire surface, and on top of that, Si3N and a film 6 are formed.
Next, a polycrystalline Si layer 7 having a thickness corresponding to the depth of the groove 4 is formed by a known method such as CVD, and after oxidizing the surface to form an oxide film 8, a Si3N4 film 9 is formed. was formed. A resist film was applied to the entire surface, and the resist film was patterned using the photomask used when forming the grooves 4 in the previous step to form a resist pattern 10. (Figure 3) This resist pattern 1o
Using as a mask, the Si3N4 film 9 and the oxide film 8 are selectively etched, and further, using these iI8 and 9 as a mask, the polycrystalline Si7 is etched until the surface of the underlying Si3N4 film 6 is exposed.

The polycrystalline Si7 was oxidized using the Si3N films 6, 9 as masks to form an oxide film 11 with a thickness of about 500 nm on the surface of the polycrystalline Si7 (Fig. 4).6 Next, the Si3N4 films 6, 9 and The oxide films 5 and 8 are etched and removed.

The isolation process has been completed (Figure 5), at this time,
The oxide film 11 is also slightly etched and its thickness is reduced, but since the thickness of the oxide film 11 is much larger than the thickness of the removed oxide film 5.8, it is not completely removed and many It remains on the crystalline silicon 7.

After this, the surface of the buried polycrystalline Si7 is lightly oxidized (approximately 1
00100n, and a transistor (not shown) was further formed in the isolated island 12 of the Si substrate 1.

[Effects of the Invention] When a bipolar integrated circuit was formed using the present invention, the single-separation capacitance was small, so high speed was achieved, and the yield was good due to less occurrence of crystal defects. Furthermore, when forming a transistor using the thick oxide film 11 at the end, self-alignment is possible and the degree of integration can be increased.

Furthermore, since the isolation formed according to the present invention penetrates through the buried layer 2 by etching, insulation between elements can be maintained as is, but oxidation! There is also a possibility that a channel may be generated due to the surface charge of 115, etc. Therefore,
If a P-type impurity such as B is introduced as a channel stopper into the polycrystalline silicon filled in the groove 4 by diffusion or ion implantation in the state shown in Fig. 1, the isolation between elements can be further improved. Become.

As is clear from FIG. 5, according to the present invention, the thick oxide film 11 is deposited only on the end surface of the isolation region, and no thick oxide film is deposited near the center.
Therefore, there is no risk of stress being applied to the silicon substrate 1.
There is no risk of warpage or crystal defects occurring in the substrate.

[Brief explanation of drawings]

1 to 5 are process diagrams showing one embodiment of the present invention. 1... Silicon substrate, 3, 5, 8, 11... Oxide film, 6.9... Silicon nitride film, 7... Polycrystalline silicon film.

Claims (1)

[Claims] A groove formed in an isolation region of a semiconductor substrate,
at least a silicon dioxide film and a silicon nitride film laminated on the inner surface of the groove, polycrystalline silicon filling the groove, and a silicon dioxide film formed on the surface of the polycrystalline silicon; A semiconductor device characterized in that a silicon dioxide film formed on a surface of polycrystalline silicon has a thickness larger near an end of the groove than at a center of the groove.