JPS63271941A - Prevention of occurrence of crystal defect - Google Patents

Abstract

PURPOSE:To prevent the generation of crystal defect by a method wherein polySi is buried in element isolation regions to getter heavy metal contaminants and so on the active region of a device. CONSTITUTION:An N-type buried and diffused region 4 is formed in a substrate 1 and thereafter, an N-type epitaxial layer 5 is grown in a prescribed film thickness, a thermal oxide film 2 is grown and after insulating regions are patterned, grooves 3 for insulation are formed. Then, polySi is grown to fill the insulating grooves 3, then the unnecessary polySi on the film 2 is removed and the polySi 6 is left only in the grooves 3. Then, if an impurity for insulation, boron, is diffused using the film 2 as a mask to manufacture a transistor, heavy metal contaminants mixed during those processes are gettered to the grain boundary of the polycrystalline polySi 6 for insulation and the contaminants are eliminated from the active region of a device. Thereby, the generation of crystal defect in the device active region can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for preventing crystal defects from occurring by gettering contaminants such as heavy metals from a device active region.

[Conventional technology]

Conventionally, this type of gettering method involves introducing strain to the back surface of a single crystal substrate to getter away heavy metals and the like in the device active region. In addition, in the case of a Si single crystal substrate, a so-called intrinsic getter (hereinafter referred to as "intrinsic getter") is used to precipitate oxygen in the Si single crystal substrate and use strain between the precipitate and the bulk to get heavy metal contaminants in the device active region. (referred to as IG effect) was used.

[Problem that the invention seeks to solve]

The above-described conventional gettering method has the drawback that if the back surface of the single crystal substrate is strained, the introduced strain disappears during heat treatment during device manufacturing, and the gettering effect cannot be maintained until the final step of the device manufacturing process. Furthermore, depending on the heat treatment in the device manufacturing process and the oxygen concentration in the single crystal substrate, crystal defects may occur in the device active region, leading to a decrease in device yield. Therefore, it is necessary to strictly control the oxygen concentration of the single crystal substrate.
It is impractical in various devices manufactured with various combinations of heat treatments.

[Means for solving problems]

The crystal defect prevention method of the present invention prevents the occurrence of crystal defects in the device active region by gettering heavy metal contaminants and the like in the device active region by embedding polycrystalline silicon in the element isolation region.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a longitudinal sectional view of an embodiment of the present invention.

After forming an N-type buried diffusion region 4 on a P-type Si single crystal substrate 1 by oxidation and photolithography, an N-type epitaxial layer 5 is grown to a predetermined thickness, and a thermal oxide film 2 is formed to a thickness of 5000 nm.
After growing to a thickness of ~6000 A and patterning an insulating region by photolithography, an insulating groove 3 is formed using anisotropic etching (FIG. 1(a)). Next, polycrystalline silicon is grown using the normal low pressure CVD method to fill the insulating groove 3, and then unnecessary polycrystalline silicon on the oxide film is removed by anisotropic etching, leaving only the inside of the insulating groove 3. polycrystalline silicon 6
leave. If the insulating impurity poron is diffused using the 4C2 film 2 as a mask and the transistor is then manufactured based on the normal NPNTr manufacturing process, the heavy metal contaminants mixed in during those processes will be removed from the insulating polycrystalline silicon. The contaminants are gettered to the grain boundaries of the device, and the device active region is free of contaminants, improving device yield.

[Example 2] FIG. 2 is a longitudinal sectional view of Example 2 of the present invention.

An oxide film 7 is formed on a P-type 8i single crystal substrate 1, and a pN-type buried diffusion layer 4 is selectively formed by photolithography (
Figure 2(a)). Next, an oxide film 7 is selectively left in the insulating region 8 by photolithography (FIG. 2(b)). Epitaxial growth is performed on the substrate, and the epitaxial layer becomes polycrystalline in the region of the oxide film 8 in the insulating region, and the polycrystalline silicon 9 and other device active regions grow epitaxially and become single crystals (FIG. 2(C)). Thereafter, boron is diffused into the insulating polycrystalline silicon 9 by oxidation and photolithography to perform element isolation. This polycrystalline silicon 9 getteres heavy metal contaminants during the device manufacturing process, eliminates contaminants from the device active region, and improves device yield.

〔Effect of the invention〕

As explained above, the present invention embeds polycrystalline silicon in the element isolation region, and the getter effect of heavy metal contamination in the device active region at its grain boundaries is suppressed, and the IG effect is not eliminated by heat treatment during the manufacturing process. There is no need to strictly control the Si single crystal substrate as in the case of the above method.

[Brief explanation of drawings]

Fig. 18191b) Fig. 2 is a process cross-sectional view of a second embodiment for embedding polycrystalline silicon into the element isolation region of the present invention. 1...Si single crystal substrate, 2...Oxide film on curved epitaxial layer, 3...Insulating groove, 4...
N-type buried diffusion layer, 5...N-type epitaxial layer, 6...polycrystalline silicon in insulating groove, 7...
...8i Oxide film on single crystal substrate, 8... Oxide film in insulating region, 9... Polycrystalline silicon in insulating region polycrystallized during epitaxial growth. ／””Wl'7n Agent Patent Attorney Susumu Uchihara 1, ” -,,
−;:Figure 1

Claims (1)

[Claims] A crystal defect prevention method characterized by gettering heavy metal contaminants, etc. in a device active region by embedding polycrystalline silicon in an element isolation region.