JPH02156540A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02156540A JPH02156540A JP31114988A JP31114988A JPH02156540A JP H02156540 A JPH02156540 A JP H02156540A JP 31114988 A JP31114988 A JP 31114988A JP 31114988 A JP31114988 A JP 31114988A JP H02156540 A JPH02156540 A JP H02156540A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- single crystal
- semiconductor single
- crystal substrate
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000013078 crystal Substances 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims description 15
- 229910052782 aluminium Inorganic materials 0.000 abstract description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 13
- 230000007547 defect Effects 0.000 abstract description 12
- 239000012535 impurity Substances 0.000 abstract description 4
- 229910001385 heavy metal Inorganic materials 0.000 abstract description 2
- 238000000206 photolithography Methods 0.000 abstract description 2
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 238000005247 gettering Methods 0.000 description 6
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- YZCKVEUIGOORGS-IGMARMGPSA-N Protium Chemical compound [1H] YZCKVEUIGOORGS-IGMARMGPSA-N 0.000 description 1
- 235000006732 Torreya nucifera Nutrition 0.000 description 1
- 244000111306 Torreya nucifera Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- -1 for example Chemical compound 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置の製造方法に関し、特にゲッタリン
グ技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to gettering technology.
従来、半導体単結晶基板の裏面に意図的に歪層を導入し
て、プロセス中に付着する不純物の吸収源として利用す
るExtrinsic Gettering法としては
、サンドブラスト法1機械的引っかき傷を入れる方法、
レーザー照射法、イオン注入法、さらに窒化膜やポリシ
リコン膜を付ける方法等がある。Conventionally, the extrinsic gettingtering method, in which a strained layer is intentionally introduced on the back surface of a semiconductor single crystal substrate and used as an absorption source for impurities that adhere during the process, includes sandblasting method 1 method of creating mechanical scratches,
There are laser irradiation methods, ion implantation methods, and methods of attaching a nitride film or polysilicon film.
上述した従来のゲッタリング方法はすべて裏面に歪層を
形成する為十分な効果が得られるとは限らず、エピタキ
シャル成長層に発生する結晶欠陥を完全に抑えることは
できないという欠点がある。All of the above-mentioned conventional gettering methods do not necessarily produce sufficient effects because they form a strained layer on the back surface, and have the drawback that crystal defects occurring in the epitaxially grown layer cannot be completely suppressed.
上述した従来のゲッタリング方法は半導体単結晶基板の
裏面に歪層を形成してゲッタリング効果を得ようとする
のに対して本発明は、半導体単結晶基板表面のある特定
領域に歪層を形成する為に、より高いゲッタリング効果
が得られるという相違点を有する。The above-mentioned conventional gettering method attempts to obtain a gettering effect by forming a strained layer on the back surface of a semiconductor single-crystal substrate, whereas the present invention aims to obtain a gettering effect by forming a strained layer on the back surface of a semiconductor single-crystal substrate. The difference is that a higher gettering effect can be obtained because of the formation.
本発明の半導体装置の製造方法は、半導体単結晶基板表
面のある特定領域に歪層を形成する工程と、前記工程後
にエピタキシャル成長層を形成する工程とを有する。A method for manufacturing a semiconductor device according to the present invention includes a step of forming a strained layer in a specific region of a semiconductor single crystal substrate surface, and a step of forming an epitaxial growth layer after the step.
本発明について図面を参照して説明する。 The present invention will be explained with reference to the drawings.
第1図は本発明の半導体装置の製造方法の一実施例を示
す半導体装置の縦断面図である。FIG. 1 is a longitudinal sectional view of a semiconductor device showing an embodiment of the method for manufacturing a semiconductor device of the present invention.
先ず第1図(a)に示すように半導体単結晶基板11表
面にアルミニウムを例えば約1μmスパッタリングして
アルミ膜12を形成する。First, as shown in FIG. 1(a), an aluminum film 12 is formed on the surface of a semiconductor single crystal substrate 11 by sputtering aluminum to a thickness of, for example, about 1 μm.
次に第1図(b)に示すように各半導体チップの分離領
域であるスクライブ線領域14のアルミ膜をフォトリソ
グラフィーにより除去する。アルミニウムのエツチング
には、例えばリン酸:硝酸:酢酸:水=16:[2:1
の混合液を使用する。Next, as shown in FIG. 1(b), the aluminum film in the scribe line region 14, which is the separation region of each semiconductor chip, is removed by photolithography. For etching aluminum, for example, phosphoric acid: nitric acid: acetic acid: water = 16: [2:1
Use a mixture of
次に、第1図(c)に示すように半導体単結晶基板11
の表面に例えばエネルギー密度約20J/cniのQス
イッチドNd:YAGレーザー光15を照射して歪層1
6を形成する。この時、アルミ膜13はレーザ光を反射
する為、アルミ膜13の下の半導体単結晶基板には歪層
は形成されない。Next, as shown in FIG. 1(c), a semiconductor single crystal substrate 11
For example, by irradiating the surface of the strained layer 1 with a Q-switched Nd:YAG laser beam 15 having an energy density of about 20 J/cni.
form 6. At this time, since the aluminum film 13 reflects the laser beam, no strained layer is formed on the semiconductor single crystal substrate under the aluminum film 13.
次に第1図(d)に示すようにアルミ膜13を例えばリ
ン酸:硝酸:酢酸:水=16:1:2:1の混合液で完
全に除去する。Next, as shown in FIG. 1(d), the aluminum film 13 is completely removed using, for example, a mixed solution of phosphoric acid:nitric acid:acetic acid:water=16:1:2:1.
次に第1図(e)に示すように半導体単結晶基板11の
上にエピタキシャル成長層を形成させる。Next, as shown in FIG. 1(e), an epitaxial growth layer is formed on the semiconductor single crystal substrate 11.
なおこの際、塩化水素ガス等による半導体単結晶基板1
1の清浄化は不用である。At this time, the semiconductor single crystal substrate 1 is heated using hydrogen chloride gas, etc.
Cleaning step 1 is unnecessary.
歪層16上に形成され東エピタキシャル成長層には結晶
欠陥が発生して、結晶欠陥領域18を形成するが、その
周囲には歪層16によってゲッタリングされた結晶欠陥
の発生が抑えられた良質のエピタキシャル成長層17が
形成される。Crystal defects are generated in the east epitaxial growth layer formed on the strained layer 16 to form a crystal defect region 18, but around the crystal defect region 18 there is a high quality layer in which the generation of crystal defects gettered by the strained layer 16 is suppressed. An epitaxial growth layer 17 is formed.
第2図は本発明の他の実施例の縦断面図である。FIG. 2 is a longitudinal sectional view of another embodiment of the invention.
先ず第2図(a)に示すように半導体単結晶基板21表
面に酸化膜22を例えば約8000〜9000人形成さ
せスクライブ線領域23の酸化膜22を例えば弗酸:水
工1:20溶液でエツチングしてパターニングされた酸
化膜22を形成する。First, as shown in FIG. 2(a), an oxide film 22 is formed on the surface of a semiconductor single crystal substrate 21 by, for example, about 8,000 to 9,000 people, and the oxide film 22 in the scribe line area 23 is coated with a solution of, for example, hydrofluoric acid:hydrogen 1:20. A patterned oxide film 22 is formed by etching.
次に第2図(b)に示すように半導体単結晶基板21を
、純水24で満たした超音波発生装置25の中へ入れる
。そして例えば約10〜20分間、例えば約20〜30
KH7,100〜300Wの超音波を発生させる。この
時、スクライブ線領域23には歪層28が形成される。Next, as shown in FIG. 2(b), the semiconductor single crystal substrate 21 is placed into an ultrasonic generator 25 filled with pure water 24. and for example about 10 to 20 minutes, such as about 20 to 30 minutes.
KH7, generates 100-300W ultrasonic waves. At this time, a strained layer 28 is formed in the scribe line region 23.
次に第2図(c)に示すように半導体単結晶基板21の
上にエピタキシャル成長層を形成させる。Next, as shown in FIG. 2(c), an epitaxial growth layer is formed on the semiconductor single crystal substrate 21.
以下は、第1図の実施例と同一である。The following is the same as the embodiment shown in FIG.
なお、歪層の形成方法は、レーザー照射及び超音波に限
ったものではなく他の方法で行なってもよい。Note that the method for forming the strained layer is not limited to laser irradiation and ultrasonic waves, and other methods may be used.
以上説明したように本発明は半導体単結晶基板表面のあ
る特定領域に歪層を形成した後にエピタキシャル成長層
を形成することにより、歪層が重金属不純物等をゲッタ
リングして、結晶欠陥の発生を抑えた良質のエピタキシ
ャル成長層を形成できる効果がある。As explained above, the present invention forms a strained layer in a specific region on the surface of a semiconductor single crystal substrate and then forms an epitaxial growth layer, so that the strained layer getters heavy metal impurities and suppresses the occurrence of crystal defects. This has the effect of forming a high quality epitaxial growth layer.
スクライブ線領域、15・・・・・・レーザー光、16
・・・・・歪層、17・・・・・・ゲッタリングされた
エピタキシャル成長層、18・・・・・・結晶欠陥領域
、21・・・・・・半導体単結晶基板、22・・・・・
・パターニングされた酸化膜、23・・・・・・スクラ
イブ線領域、24・・・・・・純水、25・・・・・・
超音波発生装置、26・・・・・・ゲッタリングされた
エピタキシャル成長層、27・・・・・・結晶欠陥領域
、28・・・・・・歪層。Scribe line area, 15... Laser light, 16
...Strained layer, 17...Gettered epitaxial growth layer, 18...Crystal defect region, 21...Semiconductor single crystal substrate, 22...・
・Patterned oxide film, 23...Scribe line area, 24...Pure water, 25...
Ultrasonic generator, 26...Gettered epitaxial growth layer, 27...Crystal defect region, 28...Strained layer.
代理人 弁理士 内 原 晋Agent Patent Attorney Susumu Uchihara
第1図は本発明の一実施例の縦断面図である。
第2図は本発明の他の実施例の縦断面図である。
11・・・・・・半導体単結晶基板、12・・・・・・
アルミ膜、13・・・・・・パターニングされたアルミ
膜、14・・・・・・(cLノ
(I))
(C)
U)
(e)
半
(財)
(a)
茅2図FIG. 1 is a longitudinal sectional view of an embodiment of the present invention. FIG. 2 is a longitudinal sectional view of another embodiment of the invention. 11... Semiconductor single crystal substrate, 12...
Aluminum film, 13... Patterned aluminum film, 14... (cLノ(I)) (C) U) (e) Half (Foundation) (a) Kaya 2 figure
Claims (1)
工程と、前記工程後にエピタキシャル成長層を形成する
工程とを有することを特徴とする半導体装置の製造方法
。1. A method for manufacturing a semiconductor device, comprising the steps of forming a strained layer in a specific region on a surface of a semiconductor single crystal substrate, and forming an epitaxial growth layer after the step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31114988A JPH02156540A (en) | 1988-12-08 | 1988-12-08 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31114988A JPH02156540A (en) | 1988-12-08 | 1988-12-08 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02156540A true JPH02156540A (en) | 1990-06-15 |
Family
ID=18013700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31114988A Pending JPH02156540A (en) | 1988-12-08 | 1988-12-08 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02156540A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63120430A (en) * | 1986-11-10 | 1988-05-24 | Nec Corp | Method for preventing occurrence of crystal defect |
JPS63271941A (en) * | 1987-04-28 | 1988-11-09 | Nec Corp | Prevention of occurrence of crystal defect |
-
1988
- 1988-12-08 JP JP31114988A patent/JPH02156540A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63120430A (en) * | 1986-11-10 | 1988-05-24 | Nec Corp | Method for preventing occurrence of crystal defect |
JPS63271941A (en) * | 1987-04-28 | 1988-11-09 | Nec Corp | Prevention of occurrence of crystal defect |
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